NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2004 MAPLD Technical Program

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 8-10, 2004

Session C. Radiation and Mitigation Techniques

Thursday, September 9, 2004

Session Chairs:
Anne Clark - U.S. Air Force
Lewis Cohn - Defense Threat Reduction Agency

8:00 am		Submission 142 "Single Event Effect (SEE) Test Results on the Virtex-II FPGA Digital Clock Manager (DCM)" Jason Moore1, Carl Carmichael1, Gary Swift2, and Jeff George3 1 Xilinx Corporation 2 California Institute of Technology/Jet Propulsion Laboratory 3 The Aerospace Corporation Abstract: moore_a.doc Presentation: c142_moore_s.ppt
8:25 am		Submission 135 "Persistent Errors in SRAM-based FPGAs" D. Eric Johnson1, Keith S. Morgan1, Michael J. Wirthlin1, Michael P. Carey2, and Paul S. Graham2 1Brigham Young University 2 Los Alamos National Laboratory Abstract: johnson_a.pdf Presentation: c135_johnson_s.pdf
8:50 am		Submission 192 "Soft Errors: Simulation and Estimation Engine" V. Degalahal, N Vijaykrishnan, M J Irwin, S. Cetiner, F. Alim, and K. Unlu Penn State University Abstract: degalahal_a.pdf Presentation: c192_degalahal_s.ppt
9:15 am		Break Outside the Amphitheater and Dedicated Poster Session.
10:45 am		Submission 144 "Tradeoffs in Flight-Design Upset Mitigation in State-of-the-Art FPGAs: Hardened By Design vs. Design-Level Hardening" Gary M. Swift, California Institute of Technology/Jet Propulsion Laboratory Abstract: swift_a.html Presentation: c144_swift_s.ppt
11:10 am		Submission 127 "Radiation Effects in the Aeroflex RadHard Eclipse FPGA" Ron Lake Aeroflex Colorado Springs Abstract: lake_2_a.doc Presentation: c127_lake_s.ppt

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