NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2005 MAPLD International Conference

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 7-9, 2005

Session H: Birds of a Feather: Reconfigurable Computing

Session Chairs:
Alan Hunsberger, National Security Agency
Douglas Fouts, Naval Postgraduate School

The 2005 MAPLD conference birds-of-a-feather (BOF) session on reconfigurable computing (RC) was divided into 2 sections. BOF H1 was held on Wednesday afternoon, September 7th, from 4:05 PM to 5:35 PM in Hemisphere A. BOF H2 was held on Thursday afternoon, September 8th, from 4:30 PM to 5:30 PM, also in Hemisphere A.  Both sessions were co chaired by Alan Hunsberger of the National Security Agency and Douglas Fouts of the Naval Postgraduate School.

BOF H1 was further divided into 2 parts. Introductory Slides

The first part was held from 4:05 PM to 4:45 PM and consisted of 2 presentations on reconfigurrable computing for space applications. The first presentation was made by Robert Hodson from the NASA Langley Research Center and was titled "An Architecture for Reconfigurable Computing."  (paper)

The second presentation was made by John Hayes from the Applied Physics Laboratory at Johns Hopkins University and was titled "The Scalable Configurable Instrument Processor."

For the second part of BOF H1, a panel discussion session was held from 4:45 PM to 5:35 PM. The topic for the discussion was "Major Problems and Issues in Developing a Space RC System and Potential Solutions". Panelists were:

BOF H2 was divided into 3 parts. Introductory Slides

The first part of the BOF consisted of vendor announcements from 4:30 PM to 4:45 PM. Vendors making short announcements of new RC hardware and software products were:

The second part of BOF H2 was held from 4:45 PM to 5:30 PM and consisted of short presentations by users of the various different RC software development environments and tools.

The third part of BOF H2 was held from 5:30 PM to 6:00 PM and consisted of a panel discussion that sought answers to the question: "Can we develop a software-level programming approach (e.g., a C language compiler) for FPGAs that spans the needs of the high performance reconfigurable computing community with a multitude of FPGA-based HPC systems and also the needs of the electronic design automation community with a multitude of FPGA board designs?" The members of the panel came prepared with position statements.  The panelists were:

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