NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2005 MAPLD International Conference

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 7-9, 2005

Virginia Ross
Air Force Research Laboratory

Biography

Organization: AFRL/Information Directorate (AFRL/IF)

Education: B.S. (Chemistry, Minor in Chemical Engineering) 1975, Iowa State University; M.S. (Mechanical Engineering) 1984, California State University, Long Beach; M.ENG. (Master of Engineering) (Technical Japanese) 1999, University of Wisconsin, Madison

Work History/Accomplishments: Ms. Ross is the AFRL/IF Distributed Center Manager and S/AAA, overseeing daily operation of the DC and interfacing with customers and the HPCMPO. This also includes coordination of Discriminating Interactive HPC Technology and “HPC to the Field” demonstrations, where HPC assets are deployed for field applications. In addition, she manages several research efforts in computer architecture and both in-house and contractual research in real-time grid computing. She managed the $5M Wafer Scale Signal Processing Technology effort, designing a supercomputer system using AFRL/IF designed FPASP5 chips, which was successfully field tested in the Discriminating Interceptor Technology Program. She has been a consultant to the FOPEN program, a joint DARPA, Army, and Air Force program. She has over 31 years of technical experience in the DoD, industry, and academia. Ms. Ross is active in the IEEE, ASME, and the local engineering council, and has held numerous positions over the years. In ASME, she has held several regional and society-wide roles, including being a member of the 2002-2003 Nominating Committee, which selected members for regional and society-wide offices. She is also a member of the Professional Advisory Board for Mechanical Engineering Technology at SUNY Institute of Technology.

Ms. Ross has published numerous journal and conference papers, has spoken at several government reconfigurable computing conferences, and is serving as a session chair at the MAPLD International Conference for the third time.

 

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