"Design Techniques for Radiation Hardened Phase Locked Loops"

Anantha Nag Nemmani, Martin Vandepas, Kerem Ok, Kartikeya Mayaram, and Un-Ku Moon
Oregon State University


Phase-locked loops (PLLs) are key building blocks of frequency synthesizers and clock generators and they are used in nearly all analog, digital, and RF ICs. Although extensive work has been done in PLLs, very few radiation-hard PLL designs are available. Reliable functioning of the systems that include PLLs in extreme environments can be achieved by hardening the designs against total ionization dosage (TID) and single event transients (SETs). A typical PLL block is made up of the following: a phase detector, loop filter, voltage-controlled oscillator (VCO) and the frequency divider. This paper examines the effect of radiation on a PLL and suggests techniques that enable radiation hard PLL designs.

Our measurements from a fabricated and irradiated PLL have shown that TID changes the loop parameters such as charge-pump current, VCO operating range etc. These changes can be easily accounted for by including calibration techniques. However, the PLL is not immune to a single event transient. Simulation results show that a SET on the VCO control node sends the PLL out of lock and it takes several time-constants for the loop to recover. We have addressed this problem with the help of an all digital PLL. Since radiation hard design techniques are well known for digital circuits, we can apply these to the all digital PLL. A digital phase locked loop with self-calibration and error correction circuitry yields a radiation hard PLL. This paper describes one such design.

A digital PLL consists of a digitally controlled analog oscillator (DCAO), a frequency divider, a time-to-digital (TDC) converter and a digital loop filter. The DCAO is an analog oscillator whose frequency is controlled by a digital control word. The TDC detects the time difference between two clock edges and employs an inverter delay chain to measure the time difference. The loop filter is a proportional-integral filter and it generates the digital control word which is input to the DCAO. Quantization in time and frequency caused by the TDC and the DCAO are important considerations and this paper analyzes their impact on the performance of the overall PLL.


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