"An Ultra Low Power Reconfigurable Task Processor for Space"
Brian Smith1, Greg Alkire1, and Wes Powell2
2NASA Goddard Space Flight Center
The Reconfigurable Task Processor (RTP) is being developed under NASA SBIR funding by PicoDyne Inc. The RTP combines a 32-bit processor with a memory-mapped block of RAM-configured FPGA on a single chip. The RTP achieves low power operation through implementation on PicoDyneís Cool-RADô Ultra Low Power Radiation Tolerant CMOS process. The Cool-RADô process allows operation in a space radiation environment at a low core voltage of 0.5V. The implementation is discussed, detailing the processor and FPGA sections, their integration, and possible applications of the device.
2005 MAPLD International Conference Home Page