"SEU Mitigation in Re-Configurable FPGAs: Picking the Right Tool for the Job"

Brendan Bridgford and Carl Carmichael
Xilinx Inc.


The body of literature on single-event effect (SEE) mitigation techniques for re-configurable FPGAs has focused almost exclusively on the paired tactics of triple-modular redundancy (TMR) and configuration scrubbing. TMR provides design robustness in the face of any single event effect, while configuration memory upset detection and correction (“configuration scrubbing”) prevents bit upset accumulation from defeating TMR. Implicit in the pairing of these tactics is that designs must always be made impervious to SEEs, regardless of the costs and benefits of these mitigation techniques for a given mission.

This paper will argue that the costs of TMR and configuration scrubbing must be individually weighed against their benefits, taking into consideration a range of mission characteristics. Some scenarios will call for one mitigation technique, but not the other; still other scenarios will call for neither mitigation technique. A decision framework will emerge from this analysis that will aid designers and managers in justifying the inclusion or omission of TMR and configuration scrubbing for a given design.


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