"Analysis of an FPGA Based Reconfigurable Computer with Sorting Algorithms"

John Harkins, Tarek El-Ghazawi, Esam El-Araby, and Miaoqing Huang
The George Washington University


Several popular sorting algorithms are used to help analyze a new class of high performance computing machine that offers Field Programmable Gate Arrays (FPGAs) in addition to microprocessors as computational resources. FPGA performance is compared to microprocessor performance using several sorting algorithms including heap sort, quick sort, radix sort, and odd/even merging as benchmarks. The machine used as the subject of this study is the SRC 6 FPGA based reconfigurable computer from SRC Computers. One of the features of this machine is that it includes a C compiler that allows C code to be compiled into gates for execution on the FPGAs. The paper examines compiler performance, system ease of use, and hardware system architecture. Execution speeds and resource usage results are used to address system architecture choices and compiler performance.

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