"Automation Techniques for Fast Implementation of High Performance DSP Algorithms in FPGAs"
L-3 Communications, Inc.
The synthesis and implementation of high performance DSP designs often requires careful design practices and considerable implementation and verification time. This paper looks at implementing DSP algorithms in FPGAs by using automated techniques focused toward high performance synthesis, timing and placement combined with Hardware-In-The-Loop (HITL) testing. The goal of the paper is to identify automated techniques for faster implementation of these algorithms in FPGAs.
The paper considers automating portions of the DSP design and implementation process, which include both FPGA fabric as well as other primitives such as DCMs, multipliers and clocking strategies. The focus of the automation techniques is to reduce design time by automating high performance implementation techniques, perform error checking of the implementation and provide greater insight into successful high performance implementations. Positive and negative aspects of the automation techniques are discussed.
The automation techniques require practical performance benchmarking as the true measure of performance. Basic HITL testing of the automation techniques are conducted on incremental portions of a design as well as the overall integration of the design. Practical results are described including techniques that optimize the implementation path of high performance designs.
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