"Implementing Digital Signal Processing Algorithms in Actel's RT54SX-S Family"

Ken Stevens
University of Colorado, Boulder


FPGAs offer an attractive platform for the implementation of digital signal processing functions in spaceflight applications because they allow the designer to optimize between performance and power by precisely tailoring the processing logic to mission requirements. One obstacle to efficient algorithm development is the fact that the tool flow for Actelís RT54SX-S family does not inherently support translation from a high-level analysis tool, such as the Interactive Data Language (IDL) by Research Systems Inc, to gate-level implementation. Another is that to provide reasonable algorithm performance with the resources available in the RT54SX-S family often requires a highly-optimized VHDL-based implementation. Given these constraints, a methodology that effectively combines the use of a high-level analysis tool for algorithm characterization and refinement with VHDL simulation and in-circuit testing of the FPGA logic implementation is essential.

This paper describes methods used in the development of the FPGA-based digital filters, vector processor, and spectral analysis processor for the electro-magnetic fields instruments on NASAís THEMIS project. Although methodology is the primary focus, implementation examples drawn from the development of the digital signal processing FPGAs are used to illustrate key points. Items that are addressed include:

From a technical perspective, emphasis is placed on identifying methods that both save time and help to ensure consistency throughout the various stages of development. From a program perspective, emphasis is placed on how the methodology described fosters and maintains a close working relationship with the science team by allowing them to interact with the system throughout the development process using a familiar high-level analysis tool.

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