Reconfigurable Computing:
Current Status and Potential for Spacecraft Computing Systems

Rod Barto
NASA Office of Logic Design

Abstract

The predominant thought regarding reconfigurable computing for spacecraft applications appears to be targeted towards developing a set of processing system building blocks that would be configured during the spacecraft design phase into a system that would remain static during the mission. However, the greatest benefit from reconfigurable computing would come from systems that were dynamically reconfigurable during the mission. During the 1970s and 1980s, computer architecture researchers showed the performance gains that could be had by implementing in hardware the algorithms that were usually implemented in software running on general purpose computers. The problem with using algorithmic-specific hardware in a system is that every hardware architecture developed generally supported only one or a limited class of algorithms, so that a system requiring the execution of a number of algorithms to meet its mission requirements would require a number of functional units that each had a limited number of uses, resulting in a system of considerable mass. Now, with the advent of SRAM-based FPGAs that can be reconfigured in a relatively short period of time, it is possible that a system requiring a number of algorithmic-specific hardware units can instead have a small number of hardware units that can each be reconfigured into a number of algorithmic-specific architectures. This could be advantageous to missions that require complicated on-board processing. This paper will discuss the current state-of-the-art in reconfigurable computing thought, and present some examples of systems requiring extensive on-board processing that would benefit from dynamically reconfigurable computing systems.

 

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