"Development and Maintenance of User Libraries for SRC Reconfigurable Computers"

Kris Gaj1, Tarek El-Ghazawi2, Paul Gage3, Dan Poznanovic3, Chang Shu1, Deapesh Misra1, Miaoqing Huang2, Esam El-Araby2, Mohamed Taher2

1George Mason University
2The George Washington University
3SRC Computers, Inc.

Abstract

The success of reconfigurable computers, as a viable alternative for traditional parallel computers, depends on the existence of comprehensive libraries of user macros and functions capable of running on Field Programmable Gate Arrays (FPGAs), and offering significant speed-ups compared to state-of-the-art microprocessors. The development of such libraries cannot be limited to a single vendor, but must be shared by multiple developers, including both academic and industrial groups.

In this paper, we describe a comprehensive procedure, developed in collaboration among SRC Computers, Inc., The George Washington University (GWU), and George Mason University (GMU), for the development of user libraries for SRC Reconfigurable Computers. This procedure involves the definition of a standard hierarchy of library files, and the existence of scripts capable of processing this hierarchy in order to obtain a precompiled version of a library that can be used for development of applications and shared with other groups. Each library component is defined using several types of files, describing hardware function, interface, and performance characteristics. Each component contains also a high-level language (HLL) source code with an equivalent functionality, which can be used for debugging and speed-up measurements.

Several user libraries, covering a wide range of functions in the area of cryptography and image processing have been developed at GWU and GMU. These libraries have been used to test the viability, ease of use, flexibility, and scalability of the original methodology for the development of SRC user libraries. Multiple improvements and modifications have been proposed, and have been either implemented, or are under development by SRC Computers, Inc. One of the most important issues under consideration includes the support for hardware library functions with variable size of operands. Several solutions to this problem have been identified, implemented, and compared against each other.

All hardware library functions have been characterized in terms of the FPGA resource usage, and the speed-up compared to traditional microprocessors. The issues of portability of SRC libraries to other reconfigurable computers available on the market are currently under investigation, and will be reported in this paper.

 

2005 MAPLD International Conference Home Page