NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

(CFP brochure - .pdf)

Late abstracts are being accepted for the 9^th annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference.  Abstracts are late with a due date of April 24, 2006 so they will not be considered for an oral presentation.  MAPLD will continue its policy of accepting late papers for the Poster Session on a first-come, first-served, space-available basis.  Poster papers are eligible for discussion in the workshop sessions.

Conference Overview:

The 9th Annual International MAPLD Conference will address new developments on programmable logic devices and technologies, digital engineering, computing and related fields for military and aerospace applications. Papers are invited on a wide range of topics such as technologies, devices, processors, systems, high performance computers, logic design, reconfigurable computers, programming tools, standards, applications (e.g., flight, encryption, communications), fault tolerance, reliability, and radiation susceptibility.

Note revised abstract submission procedures.

The Technical Program will consist of technical paper presentations, "Birds of a Feather" workshops, and a poster session. We are planning an exciting program including several special Invited Speakers including the annual Invited History talk, to be given at the Smithsonian National Air and Space Museum.  We will also continue a feature introduced in 2004, a workshop on "Digital Engineering and Computer Design - A Retrospective and Lessons Learned for Today's Engineers," featuring key design engineers from the 1960s and 1970s and historians.

This conference is open to both foreign participation and US citizens and is unclassified.  For conference program, technical, and registration information, please visit the Office of Logic Design Home Page or the 2006 MAPLD International Conference Home Page

This year, there will be a special emphasis on papers with the following themes:

"War Stories" and Lessons Learned Non-volatile, erasable memory technology Design verification and validation. Reliability and fault tolerance with FPGAs General-purpose, high-performance, PLD-based computing systems and applications. Reliability and Programmable Devices FIT rates and test vehicles New technology qualification Digital Device Obsolescence

High performance reconfigurable computers Implementing high reliability processor cores in FPGAs. Software tools Checks for low reliability design constructs. PLD tools/methods that we need but vendors don't supply. Experiences with reconfigurable computing programming tools Standards issues, portability issues and tool issues (e.g., OpenFPGA approaches) related to FPGA boards and reconfigurable computing systems

Birds-of-a-Feather Sessions: The 2005 MAPLD International Conference "Birds-of-a-Feather" workshop sessions were very popular and two  new sessions were introduced on verification of large systems and low power design.  For 2006 and our three day program, the updated program result in less overlap between sessions.  The following BOF sessions are planned:

• BOF-L: Mitigation Methods for Reprogrammable Logic in the Space Radiation Environment
• BOF-H: Reconfigurable Computing
• BOF-J: PLD Failures, Analyses, and the Impact on Systems
• BOF-S: NESC and Software
• BOF-G: Digital Engineering and Computer Design - A Retrospective and Lessons Learned for Today's Engineers
• BOF-M: Low Power Design
• BOF-R: Reviewing Military and Aerospace Designs
• BOF-W: Verification of Large Designs and Related Design Methodologies

Panel Session: Again, we will have leading engineers and managers on our panel for a most spirited "discussion."  This year's planned topic is:

"Why Is Learning Lessons From Mishaps So Hard?"
A Discussion of The Lessons Learned and Relearned
with Recommendations for Breaking the Repetitive Cycle

Seminars will again be offered (with a separate registration).  Seminars will be on September 25^th, 2006 with three full-day seminars will be given:

1. Spacewire 101
2. Real-Time Software and Operating Systems for Hardware Engineers
3. Verification Tutorial
4. Radiation and Programmable Devices
5. TBD

MAPLD topics include (but are not limited to) the following:

Design and Analysis CPU Logic Low-Power Techniques High-Speed Techniques	Applications Military (Ground, airborne, artillery, etc.) Launch Vehicle Spaceborne Arithmetic and Signal Processing Encryption Systems
Devices Advanced Devices, Technologies, and Software and Their Impact on Critical System Reliability Programmable Technologies and State-of-the-Art Devices and Programmable Elements Device Architecture	Systems and Software System-on-Chip Software Tools for Design/Analysis - HDLs, Synthesis, Design Entry Systems Translation from High Level Languages Intellectual Property
Reliability Experience and "Lessons Learned" from Mission Experience Radiation Effects, Device Reliability and Element Characteristics Fault Tolerance Use of COTS Devices in the Military and Spaceflight Environment Testing and Analysis Techniques Advanced Packaging	Adaptive Computing Systems Evolvable Hardware Reconfigurable Computing

The 9^th MAPLD International Conference is hosted by: NASA Office of Logic Design

Sponsored By: Goddard Space Flight Center National Security Agency NASA GSFC Flight Programs and Projects Directorate NASA's Electronics Parts and Packaging Program (NEPP)

For more conference information, please visit 2006 MAPLD International Conference Home Page or contact:

Richard Katz - Conference [Grunt] Chair NASA Goddard Space Flight Center mapld2006@klabs.org Tel: (301) 286-9705	Alan W. Hunsberger - Conference Co-Chair National Security Agency Tel: (443) 479-8135
Tanya Vladimirova - Conference Co-Chair University of Surrey tanya@klabs.org +44(0)1483 879137	Kevin Hames - Conference Co-Chair NASA Johnson Space Center Tel: 281 483-8592
Hans Tiggeler Conference Co-Chair, European Liaison hans@klabs.org	Rod Barto - Conference Co-Chair rod@klabs.org Office of Logic Design/Spacecraft Digital Engineering

 

Abstract Submission Procedures - Modified for 2006.

Abstracts should be approximately 1/2 page long.  They should include a brief introduction and the key points that the paper will make. 

Please send abstracts to mapld2006@klabs.org.   Submit abstracts in an attached file, using the following format: lastname_a.ext  - where last name is the name of the first author - e.g., katz_a.txt.  The 'a' is for abstract and if you have two abstracts, they should be named, for example, katz_a1.txt and katz_a2.txt.  Please include first author information for point of contact (name, affiliation, phone number, and e-mail address).   Please do not send any locked files, for example .pdf files that have security features enabled, as this increases the amount of effort in processing your submission.  ASCII text or .doc files are preferred as abstracts will be published in HTML.  .zip files will not be accepted as they are subject to filtering.

Please note the key dates and some new procedures for 2006.  Late papers will be accepted for the Poster Session, only.

April 24, 2006		Abstracts Due
May 15, 2006		Paper Acceptance Letters Sent
June 19, 2006		Preliminary presentations (Oral and poster) are due to mapld2006@klabs.org
July 12, 2006		Program Announced
August 28, 2006		Final presentations (Oral and poster) are due to mapld2006@klabs.org
September 25, 2006		Papers (Oral and poster) are due to mapld2006@klabs.org
September 26-28, 2006		2006 MAPLD International Conference
October 27, 2006		Final Update for Contributed Papers Due to mapld2006@klabs.org
November 20, 2006		Deadline for submission of Select papers.  Specify that your paper is from the 2006 MAPLD International Conference for proper routing and that the paper is to be put into the public domain with no copyright assignment or marks.  Please send one copy to mapld2006@klabs.org.

Important: Technology Transfer Considerations, Copyright, and Proprietary Information

Prospective authors are reminded that technology transfer guidelines and policies can considerably extend the time required for review of abstracts, presentations, and completed papers.  Proper Government reviews, ownership of copyright, and the absence of proprietary information is solely the responsibility of the author.  The organizing committee and their employing organizations will assume that all abstracts, presentations, and papers are appropriately cleared for unrestricted distribution to an international audience. All work submitted to MAPLD will be free of any copyright restrictions and marks and will be placed into the public domain for unlimited distribution and use.

2006 MAPLD International Conference Home Page

Home - NASA Office of Logic Design
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz