NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Call for Papers

8th MAPLD International Conference

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 7-9, 2005

Call for Papers Brochure (in .pdf format)

Abstracts are being accepted for the 8th annual Military and Aerospace Programmable Logic Devices (MAPLD) International Conference.  MAPLD will continue its policy of accepting late papers for the Poster Session on a first-come, first-served, space-available basis.  Poster papers are eligible for discussion in the workshop sessions.

Conference Overview:

The 8th annual MAPLD International Conference will present papers on programmable logic devices and technologies, digital engineering, and related fields, for military and aerospace applications. Devices, technologies, logic design, flight applications, fault tolerance, usage, reliability, radiation susceptibility, and encryption applications of programmable devices, processors, and adaptive computing systems in military and aerospace systems are topics for papers.

Note new abstract submission procedures.

The Technical Program will consist of technical paper presentations, workshops, and a poster session. We are planning an exciting program including several special Invited Speakers including the annual Invited History talk.  We will also continue a feature introduced in 2004, a workshop on "Digital Engineering and Computer Design - A Retrospective and Lessons Learned for Today's Engineers," featuring key design engineers from the 1960s and 1970s.

This conference is open to both foreign participation and US citizens and is unclassified.  For conference program, technical, and registration information, please visit the Office of Logic Design Home Page or the 2005 MAPLD International Conference Home Page

This year, there will be a special emphasis on papers with the following themes:

  • "War Stories" and Lessons Learned
  • High integrity systems design considerations.
  • Design verification methods.
  • Logic design guidelines.
  • Do's and Don'ts for SEU mitigation and immunity; how to analyze and evaluate a design for SEU  immunity or susceptibility.
  • Reliability and fault tolerance with FPGAs
  • General-purpose, high-performance, PLD-based computing systems and applications.
  • Micro air vehicle/unmanned air vehicle controllers
  • Digital Device Obsolescence Issues
  • Reconfigurable Computing applications such as MIL-STD interfaces, munitions controllers, and computational fluid dynamics analysis.
  • Implementing high performance, high reliability processor cores in FPGAs.
  • Software tools that check for low reliability design constructs.
  • PLD tools/methods that we need but vendors don't supply.

Birds-of-a-Feather Sessions: The 2004 MAPLD International Conference "Birds-of-a-Feather" workshop sessions were very popular and they will be returning, with additional time devoted to them.  The following BOF sessions are planned:

Panel Session: Again, we will have leading engineers and managers on our panel for a most spirited "discussion."  This year's planned topic is:

"Why Are Space Stations So Hard?"
A Discussion of the Technical, Programmatic, and Political Factors
That Have Lead To Successes and Failures Over the Last Three Decades
and Implications for Future Private Sector and Government Facilities

Seminars will again be offered (with a separate registration).  Seminars will be on September 6th, 2005 with three full-day seminars will be given:

  1. Signal Integrity, Power Integrity, and Interfacing
  2. Real-Time, Hi-Rel Software Issues for Computer Designers
  3. Device Failure Modes and Reliability
  4. Reconfigurable High-Performance Computing

MAPLD topics include (but are not limited to) the following:

  • Design and Analysis
    • CPU
    • Logic
    • Low-Power Techniques
    • High-Speed Techniques
  • Applications
    • Military (Ground, airborne, artillery, etc.)
    • Launch Vehicle
    • Spaceborne
    • Arithmetic and Signal Processing
    • Encryption Systems
  • Devices
    • Advanced Devices, Technologies, and Software and Their Impact on Critical System Reliability
    • Programmable Technologies and State-of-the-Art Devices and Programmable Elements
    • Device Architecture
  • Systems and Software
    • System-on-Chip
    • Software Tools for Design/Analysis - HDLs, Synthesis, Design Entry Systems
    • Translation from High Level Languages
    • Intellectual Property
  • Reliability
    • Experience and "Lessons Learned" from Mission Experience
    • Radiation Effects, Device Reliability and Element Characteristics
    • Fault Tolerance
    • Use of COTS Devices in the Military and Spaceflight Environment
    • Testing and Analysis Techniques
    • Advanced Packaging
  • Adaptive Computing Systems
    • Evolvable Hardware
    • Reconfigurable Computing


The 8th MAPLD International Conference is hosted by: NASA Office of Logic Design

Sponsored By:  

For more conference information, please visit 2005 MAPLD International Conference Home Page or contact:

Richard Katz - Conference [Grunt] Chair
NASA Goddard Space Flight Center
Tel: (301) 286-9705
Alan W. Hunsberger - Conference Co-Chair
National Security Agency
Tel: (443) 479-8135
Tanya Vladimirova - Conference Co-Chair
University of Surrey
+44(0)1483 879137
Kevin Hames - Conference Co-Chair for Peer-Reviewed Publications.
NASA Johnson Space Center
Tel: 281 483-8592
Hans Tiggeler
Conference Co-Chair, European Liaison
Rod Barto - Conference Co-Chair
Office of Logic Design/Spacecraft Digital Engineering


Abstract Submission Procedures - Modified for 2005.

Abstracts should be approximately 1/2 page long.  They should include a brief introduction and the key points that the paper will make. 

Please send abstracts to   Submit abstracts in an attached file, using the following format: lastname_a.ext  - where last name is the name of the first author - e.g., katz_a.txt.  Please include first author information for point of contact (name, affiliation, phone number, and e-mail address).   Please do not send any locked files, for example .pdf files that have security features enabled, as this increases the amount of effort in processing your submission.

Please note the key dates and some new procedures for 2005.  Late papers will be accepted for the Poster Session, only.

April 25, 2005 Abstracts Due
May 16, 2005 Paper Acceptance Letters Sent
June 13, 2005 Preliminary presentations (Oral and poster) are due to
July 5, 2005 Program Announced
August 8, 2005 Final presentations (Oral and poster) are due to
September 7, 2005   Papers (Oral and poster) are due to
October 7, 2005 Final Update for Contributed Papers Due
November 7, 2005 Deadline for submission of Select papers.  Specify that your paper is from the 2005 MAPLD International Conference for proper routing and that the paper is to be put into the public domain with no copyright assignment or marks.  Please send one copy to

Important: Technology Transfer Considerations, Copyright, and Proprietary Information

Prospective authors are reminded that technology transfer guidelines and policies can considerably extend the time required for review of abstracts, presentations, and completed papers.  Proper Government reviews, ownership of copyright, and the absence of proprietary information is solely the responsibility of the author.  The organizing committee and their employing organizations will assume that all abstracts, presentations, and papers are appropriately cleared for unrestricted distribution to an international audience. All work submitted to MAPLD will be free of any copyright restrictions and marks and will be placed into the public domain for unlimited distribution and use.

Industrial exhibit reservations should be sent to and should include company name and contact information (phone and email).  Please see Industrial Exhibit Request for additional information.

Note new address -

2005 MAPLD International Conference Home Page

Home - NASA Office of Logic Design
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz