NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Apollo Computers

Dual three-input NORWelded-Cordwood ConstructionROM module prior to encapsulationLogic Tray InterconnectionsMain Control Panel


Description and Performance of the Saturn Launch Vehicle's Navigation, Guidance, and Control System

Walter Haeussermann
George C. Marshall Space Flight Center
July 1970
TN D-5869

   A review of the navigation, guidance, and control system of the Saturn launch vehicle includes the system analysis and design, signal flow diagrams, redundancy, and self-checking features used to obtain extreme reliability for crew safety.
   The iterative path adaptive guidance mode , featuring flight path optimization, is explained and presented in its computational form. Following the analytical considerations, the main guidance and control components are described. The navigation and control information is obtained inertially by a gyro-servo-stabilized, three-gimbal platform system with three mutually orthogonal pendulous-integrating gyro accelerometers; the single-degree-of-freedom gyros as well as the accelerometers use externally-pressurized gas bearings. Rate gyroscopes provide attitude stabilization; some vehicle configurations require additional accelerometer control to reduce wind loads. The digital computer system serves as the computation, central data, and onboard programming center, which ties in with the ground computer system during the prelaunch checkout of the overall system. The control signals are combined, shaped, attenuated, and amplified by an analog type control computer for engine actuator control.
   Results from recent launchings of Saturn V vehicles are presented to confirm the adequacy of the navigation, guidance, and control system and its overall performance even under extreme flight perturbations.

AGC NOR Gate Specifications


The documents below, courtesy of Eldon C. Hall, are the specifications and related documents for the AGC's NOR gate (flat pack, dual 3-input NOR version).

AGC Integrated Circuit Packages


The documents below, courtesy of Eldon C. Hall, discuss issues with moving to the flat package for the Block II Apollo Guidance Computer, a dual 3-input NOR microcircuit.

AGC - Saturn V LVDC Comparison


The documents below, courtesy of Eldon C. Hall, discuss an evaluation of the Apollo Guidance Computer and its potential replacement with the Saturn V Launch  Vehicle Digital Computer.

Tales from the Lunar Module Guidance Computer

Don Eyles
27th Annual AAS Guidance and Control Conference
February 4-8, 2004, Breckenridge, Colorado
Paper # AAS 04-064

The Apollo 11 mission succeeded in landing on the moon despite two computer- related problems that affected the Lunar Module during the powered descent. An uncorrected problem in the rendezvous radar interface stole approximately 13% of the computer's duty cycle, resulting in five program alarms and software restarts. In a less well-known problem, caused by erroneous data, the thrust of the LM's descent engine fluctuated wildly because the throttle control algorithm was only marginally stable. The explanation of these problems provides an opportunity to describe the operating system of the Apollo flight computers and the lunar landing guidance software.

Memory Requirements for the Launch Vehicle Digital Computer (LVDC)

J.J. Rocchio, Bellcomm, Inc.
April 25, 1967

Abstract (excerpt)

The Launch Vehicle Digital Computer (LVDC) has a modular memory system with a maximum capacity of eight modules. Each module has 16 sectors, for a total of 28 sectors (64 duplexed sectors) in all.  At this time, expected reserve capacity in the LVDC memory is about 18% (12.9 sectors duplex) of total capacity for AS 501, and only 11% (6.9 sectors duplex) for AS 504. This is considered insufficient to provide an adequate margin for new requirements and contingencies.

Saturn 5 Launch Vehicle Digital Computer. Volume 1: General Description and Theory

Laboratory Maintenance Instructions
Simplex Models
30 NOVEMBER 1964

This manual contains the laboratory maintenance instructions for breadboard model II of the Launch Vehicle Digital Computer (LVDC), NASA part number 50M35010, IBM part number 6109030, manufactured by International Business Machines Corporation, Federal Systems Division, Rockville, Maryland, under contract number NAS 8-11561.


Apollo Guidance Computer Documents


A collection of documents courtesy of MIT.

Saturn V Launch Vehicle Digital Computer and Data Adapter

M. Dickinson, J. Jackson, and G. Randa, IBM Space Guidance Center
Proceedings - Fall Joint Computer Conference

1964, pp. 501-516

Saturn V Launch Vehicle Digital Computer and Data Adapter


This paper describes the IBM Space Guidance Center's part in the Saturn V Program and the digital coputer and dat adapter being developed for the Saturn V booster.   This work is being performed under contract to NASA under direction of the Marshall Space Flight Center, Huntsville, Alabama.

The computer and data adapter are located in the Saturn V Instrument Unit and integrated into the total guidance system of the booster.   The computer interfaces only with the data adapter, which in turn presents the interface to the rest of the system.  Basically, during boost guidance, the computer evaluates in-flight changes in booster speed and position derived from an inertial platform and develops signals to control the rocket engines so as to keep the booster on course.  The data adapter takes analog inputs from sensors and converts them to digital form of the computer; it also takes the computer digital outputs, convers some of them to analog form, and sends corrections to the appropriate controls.

Some Aspects of the Logical Design of a Control Computer: A Case Study

R.L. Alonso, H. Blair-Smith, and A.L. Hopkins, Instrumentation Laboratory, MIT, Cambridge, Mass.
IEEE Transactions on Electronic Computers, December 1963, pp. 687-697


     Some logical aspects of a digital computer for a space vehicle are described, and the evolution of its logic design is traced.  The intended application and the characteristics of the computer's ancestry form a framework for the design, which is filled in by accumulation of the many decisions made by its designers.  This paper deals with the choice of word length, number system, instruction set, memory addressing, and problems of multiple precision arithmetic.
     The computer is a parallel, single address machine with more than 10,000 words of 16 bits.  Such a short word length yields advantages of efficient storage and speed, but at a cost of logical complexity in connection with addressing, instruction selection, and multiple-precision arithmetic.

Flight Computer Hardware Trends

Ramon L. Alonso, MIT, and Glenn C. Randa, IBM Corp.
Astronautics and Aeronautics
April 1967, pp. 30-34



Increasingly powerful integrated-circuit technology - promising new flight programs, controls, and displays - now challenges the foresight of the system designers.

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Last Revised: February 03, 2010
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