New FPGA Technologies: Currents, Voltages, and Temperatures
Update: April 6, 2006. Added reference 12 for RTAX2000S transient voltage specification. RTAX2000S absolute maximum voltage for VCCA has been increased to 1.7V from 1.6V.
Update: February 7, 2006. Added reference 11.
Date: October 30, 2005.
This is the eighteenth in a series of OLD News articles.
Every new generation of FPGA attracts and dazzles the logic designer with increased speed, capacity, I/O count, and capabilities. Radiation and reliability reports are examined in detail. Signal integrity simulations are run on the latest IBIS models. New software tools supporting the device, for design, analysis, and verification are studied.
But as technology advances, we must pay attention to some of the more mundane and obscure specifications and their implications for flight electronics hardware design. This note examines three of those specifications: currents, voltages, and temperatures.
Static Array Device Current
For many years, the static array currents in FPGAs has been relatively low, allowed for the construction of very low power digital systems with the use of low-power design techniques. A careful look at the specifications shows a trend towards increasing leakage currents, as the device sizes grow and the technology feature size decreases.
Specification (max) of Array Current @ 125 °C
Device Feature Size Nominal Array Voltage Array Current XQR4062XL
RTSX72SU1 0.25 µm 2.5V 25 mA XQVR1000
Total device current
0.15 µm 8-Layer Metal Process; 0.12 µm High-Speed Transistors
The largest device in each family is used.
Consult the data sheet for specific device current specifications.
I/O and auxiliary currents not included.
As is clear from the table, the newer and larger devices, built in finer feature sizes, also feature significantly higher static leakage currents. The trend is that this static current is no longer a minor portion of a system's power budget. Characterization data of device static current over temperature will be posted in the near term.
Supply Voltage Tolerance
As is well known, the supply voltages of FPGAs are dropping as technology advances. Obviously, there is a decrease in power per gate, since power is a function of the capacitance and the square of the supply voltage. However, a careful look at the specifications also shows a significant tightening of the tolerances on the array supply voltage. The table below shows the trend with the most modern flight devices requiring regulation of ±75 mV.
Specification of Supply Voltage Tolerance
Device Feature Size Nominal Array Voltage (V) Max Array Voltage (V) Nominal to Max Voltage (mV) Absolute Max Voltage (V) Nominal to Absolute Max Voltage (mV) RH1280
5.5 500 7.00 2000 XQR4062XL
3.6 300 4.00 700 UT6325
2.7 200 3.60 1100 RTSX72SU 0.25 µm 2.5 2.75 250 3.00 500 XQVR1000
2.625 125 3.00 500 RTAX2000S
1.575 75 1.70 100 XQR2V6000
1.575 75 1.65 150
Another factor for flight systems is of course radiation, in particular single event effects (SEE), which should be a familiar, well-understood topic. FPGAs employ various methods of mitigating or eliminating these effects such as scrubbing, TMR-hardened flip-flops, and other techniques.
Given the tight limits on the supply voltages, single event transients in the core power supply are of increasing importance. Indeed, one must not just accept the often misleading label "rad hard" or "rad tolerant" and assume that there are no radiation effects issues.
For example, SMD 5962-99547 (HS-117RH) states:
Single event transients (SET) < 100mV at an linear energy threshold (LET) of............................ 15MeV/mg/cm2
Input voltage ≥ 9 V and output capacitance ≥ 44 µF.
Another example is a device labeled as radiation tolerant. The chart below shows the transient effects from an Argon ion with an LET of 8.8 MeV-cm2/mg. The regulator had a 3.3V input voltage. There was 220 µF on the 1.5V output. The magnitude of the transient with a peak of 1.8 volts clearly exceeds the specification limits of modern FPGAs, as shown in the table above.
Traditionally, the rated maximum operating junction temperature of FPGAs has been 150 °C. Degrading guidelines always called for lower maximum temperatures in flight. However, with the latest generation of FPGAs we see a decrease in the specification rating to 125 °C, requiring increased care in the thermal design and analysis, especially with the increased leakage currents and the larger number of logic elements in each device.
Specification of Maximum Junction Temperature
Device Feature Size Maximum Junction Temperature (°C) RH1280
RTSX72SU 0.25 µm 150 XQVR1000
Another subtle specification is that for the XQVR1000, TIC has a narrower initialization temperature range (TIC ) of -40 ºC to +125 ºC. rather than the more typical TIC of -55 ºC to +125 ºC. This restriction does not hold for other members of that family.
- "Radiation-Hardened FPGAs," v3.1, Actel, April 2005.
- "MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 8000 GATES, MONOLITHIC SILICON," 5962-92156
"RTSX-SU RadTolerant FPGAs (UMC)," v2.1, Actel, August 2005
"MICROCIRCUIT, MEMORY, DIGITAL, CMOS, FIELD PROGRAMMABLE GATE ARRAY, 72,000 GATES, MONOLITHIC SILICON," 5962-01515.
"RTAX-S RadTolerant FPGAs," v2.1, Actel Corp., October 2005.
"QPRO XQR4000XL Radiation Hardened FPGAs," DS071 (v1.1), Xilinx, June 25, 2000.
"QPro Virtex 2.5V Radiation Hardened FPGAs," DS028 (v1.2), Xilinx, November 5, 2001.
"QPro Virtex-II 1.5V Radiation-Hardened QML Platform FPGAs," DS124 (v1.1), Xilinx, January 8, 2004
"RadHard Eclipse FPGA Datasheet," Advanced Data Sheet, Aeroflex, October 2005
"MICROCIRCUIT, LINEAR, RADIATION HARDENED, ADJUSTABLE POSITIVE VOLTAGE REGULATOR, MONOLITHIC SILICON," 5962-99547.
RTAX-S Sample ICC Data
The following is excerpted from the SMD for the RTAX2000S: "10/ AC transient VCCA limit is for radiation induced transients less than 10µs duration, and not intended for repetitive use. Core voltage spikes from a single event transient will not negatively affect the reliability of the device if, for this non-repetitive event, the transient does not exceed 1.8 V at any time, and the total time that the transient exceeds 1.575 V does not exceed 10 µs in duration."
In my new OLD (Office of Logic Design) position, I am now making some of my informal e-mail lists semi-formal. These mailings will have pointers to technical tips that can [hopefully] proactively prevent errors from getting into flight designs or make things go faster and smoother. I have included an array of people from a number of organizations; different NASA Centers, ESA, etc., as you all may distribute to people in your own organizations and other colleagues. Please let me know if you are on this list in error or if someone should be added to it. This list is targeted towards those that either will design or review space flight digital electronics. Feel free to suggest topics for discussion and research or to contribute news items. [Note for this web-based release: to become a recipient on this mailing list, please send e-mail to: email@example.com.]
All application notes are uploaded onto my www site. New additions are noted on the what's new page. I will give these mailings from time to time; too much and they will be filtered and ignored - too little and not enough information flows. So I'll try and hit a good balance.
Home - NASA
Office of Logic Design
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz