NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

AX Series Radiation Data

Total Dose
Single Event Effects

Total Dose

Total Ionizing Dose Test Report
No. 06T-RTAX2000S-D1PPY1

March 29, 2006

Part Number: RTAX2000S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1PPY1
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

TOTAL IONIZING DOSE TEST REPORT:
No. 05T-RTAX2000S-D1GAG1

October 31, 2005

Part Number: RTAX2000S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1GAG1
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

TOTAL IONIZING DOSE TEST REPORT: No. 05T-RTAX2000S-D1L9R1

October 31, 2005

Part Number: RTAX2000S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1L9R1
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

TOTAL IONIZING DOSE TEST REPORT:
No. 05T-RTAX250S-D1H381

October 27, 2005

Part Number: RTAX250S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1H381
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

TOTAL IONIZING DOSE TEST REPORT:
No. 05T-RTAX1000S-D1GAH1

August 8, 2005.

Part Number: RTAX1000S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1GAH1
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

TOTAL IONIZING DOSE TEST REPORT:
No. 05T-RTAX2000S-D1GAF1

May 24, 2005

Part Number: RTAX2000S
Package:      CQFP352
Foundry:      United Microelectronics Corp.
Technology:   0.15 µm CMOS
Die Lot:      D1GAF1
Facility:     Defense Microelectronics Activity
VCCI/VCCA:    Static at 3.3 V/1.5 V
Single ended: LVTTL
Differential: LVPECL

Single Event Effects of a 0.15µm Antifuse FPGA

J. J. Wang, B. Cronquist, J. McCollum, S. Wolday, M. Sawant, R. Katz, and I. Kleyner
2002 MAPLD International Conference, Laurel, MD.

Preliminary Total Dose Results

Irradiated by gamma statically biased (V_CCI/V_CCA = 3.3V/1.5V) at room temperature.
Dose rate = 33 rad(Si)/sec.
Total accumulated dose to 200 krad(Si)
No change in propagation delay.
No change in I_CCA.
I_CCI increased from 1.2 mA to 8 mA.

SEE

RTAX-S V_CCA Transients

Abstract
This application note describes provisions for transients on the core logic voltage, V_CCA, which are induced by single event transients (SETs).

RTAX-S V_CCA Guidelines Update

May 9, 2006

Summary
This notice is to inform you that in order to ease design constraints on power supply, Actel has analyzed and modified the guidelines for V_CCA for the RTAX-S product family. The absolute maximum voltage has been relaxed and provision has been made for a transient from an SET on the power supply. The recommended operating conditions have not been changed.

RTAX-S Single Event Effects (SEE) High-Speed Test Results – Update

Ken LaBel, NASA Goddard Space Flight Center

These charts were presented at the “RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application Briefing” held at the NASA Goddard Space Flight Center on May 10, 2006.

Outline

Introduction
Devices Under Test (DUTs) Description
Test Approach
Test Results
- Heavy Ion
- Proton
Summary

Elimination of RTAX-S I_CCA Current Increase Due to Heavy Ion-Induced Upset

May 2006

Abstract
Anomalous I_CCA current increases have been observed in RTAX-S FPGAs. The cause for this current increase was due to the routing tie offs in the devices non-hardened FIFO controller that had been modified to improve programming time in an early version of the software. Designer v7.0 SP1, released in March 2006, and later versions of the software include a routing modification that eliminates the anomalous current increases. Designers who are unable to update with the Designer software on their current project can avoid the SEU induced current increases by instantiating all available SRAM blocks in the target RTAX-S device.

Resolution of RTAX-S SEE Current Issue

Notes:

This set of charts is extracted from Dan Elftmann’s presentation at the “RT54SX-S, RTSX-SU, RTAX-S, and Eclipse FPGAs for Spaceborne Application Briefing” held at the NASA Goddard Space Flight Center on May 10, 2006.
The charts here will address solely the resolution of the increase in RTAX-S FPGA current as seen in heavy ion testing and reported at an earlier Briefing. There, the theory was that a change in tie-offs for unused logic caused contention and the increase in current. These charts provide experimental data.

RTAX-S EDAC-RAM Single Event Upset Test Report

J.J. Wang
June 4, 2004

(from Actel www site)

SUMMARY
This report focuses on the SEU (single event upset) effect in the EDAC-RAM in RTAX-S. The results come from heavy ion beam tests at BNL and TAMU. To further study the ECC and scrubbing function, probability theory and single-bit SEU measured previously are used to derive the EDAC-RAM SEU errors to compare with the directly tested results. The major conclusions include:

The ECC (error correcting code) and scrubbing function can effectively harden the EDAC-RAM, and reduce the SEU rate to be less than 1 x 10^-10 upset/bit-day.

For EDAC-RAM without scrubbing and with low scrubbing rate conditions, the derived SEU corroborates with the directly tested SEU.

The scrubbing function generally operates as expected for different clock frequencies.

Background noise and single event transient (SET) are speculated as the probable causes for inconsistence between the derived SEU and tested SEU for high scrubbing rate conditions.

RTAX-S Single Event Effects Test Report

J.J. Wang
August 3, 2004

(from Actel www site)

SUMMARY
Prototype RTAXS devices were beam-tested at BNL and TAMU for single event effects (SEE), which include single event upset (SEU), single event functional interrupt (SEFI), single event latch-up (SEL) and single event dielectric rupture (SEDR). The key results are list below:

The SEU-hardened TMR flip-flop (R-cell) meets the hardening target. The SEU rate per flip-flop at geostationary orbit for 100 mil aluminum shielding and solar-minimum environment is below 1.96×10^-11 upsets/bit•day.
There is no occurrence of SEFI in any test run.
There is no occurrence of SEL in any test run. The maximum effective LET used at BNL is 104 MeV•cm²/mg, and the maximum effective LET used at TAMU is 84 MeV•cm²/mg.
There is no occurrence of SEDR in any test run. The maximum LET used at BNL is 60 MeV•cm²/mg, and the maximum LET used at TAMU is 54 MeV•cm²/mg.

Single Event Upset and Hardening in 0.15 µm Antifuse-Based Field Programmable Gate Array

J.J. Wang, W. Wong, S. Wolday, B. Cronquist, J. McCollum, R. Katz, and I. Kleyner
jj_2003_ax.doc
nsrec_2003.ppt
nsrec_2003_portrait.ppt

Abstract
The single event effects and hardening of a 0.15 µm antifuse FPGA, the AX device, were investigated by beam test and computer simulation. The beam test showed no permanent damage mode. Functional failures were observed and attributed to the upsets in a control logic circuit, the startup sequencer. Clock upsets were observed and attributed to the single event transients in the clock network. Upsets were also measured in the user flip-flop and embedded SRAM. The hardening technique dealing with each upset mode is discussed in detail. SPICE and three-dimensional mixed-mode simulations were used to determine the design rules for mitigating the multiple upsets due to glancing angle and charge sharing. The hardening techniques have been implemented in the newly fabricated RTAXS device. Preliminary heavy-ion-beam test data show that all the hard-wired hardening solutions are working successfully.

SEE Data Summary for commercial AX1000

nsrec_ax_commercial_2003

SEE types covered: