NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

The Effects of Slew Rate on SX-S Series FPGAs

During the development of flight hardware, it was suggested that outputs in a particular design be switched to low slew since high slew drivers were not needed.  Since the first unit was already built with high slew drivers, the second unit, on an identical circuit board, was built with low slew drivers.  Data was obtained (see below) and the project engineers decided to retrofit the first unit with low slew drivers.

For the board, we have the following parameters:

• RT54SX72S Device
• CQ208 Package.
• V_CCA = 2.5 VDC
• V_CCI = 3.3 VDC

	Fast Slew	Slow Slew
Rising and Falling Edges Vertical:   1V/Division Horizontal: 5 ns/Division
Ground Noise Vertical:   200 mV/Division Horizontal: 10 ns/Division
VCCA Noise Vertical:   50 mV/Division Horizontal: 10 ns/Division

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Last Revised: February 03, 2010
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