Many modern CMOS digital microcircuits have very strong drivers; the device characteristics have changed over the years. Another change is the widespread use of HDL synthesis for logic generation and simulators for logic simulation. These simulators do not replace the need to perform proper electrical engineering of spaceborne digital electronics, in particular signal and power integrity. Of course, this is nothing new:
Connections are already more expensive than logical elements, and will become more so in the future, both because ICs will be bigger, better, and cheaper, and because increased signal speeds will require properly terminated transmission lines as connections between arrays, instead of open wires, thus increasing the cost of connections.
"Flight Computer Hardware Trends," Ramon L. Alonso, MIT, and Glenn C. Randa, IBM Corp., Astronautics and Aeronautics, April 1967, pp. 30-34.
The two charts below are based on a sample of I/V curves over several generations of Actel FPGAs. Note that the 0.8 Ám, BAE Systems produced RT1020 is far more modern than the original 2.0 Ám, MEC produced A1020 and has correspondingly high performance.
It is clear that the current generation 0.25 Ám, MEC-produced SX-S series devices have far higher drive currents than their predecessors. Thus, design practices that have worked in the past for previous generations must be re-evaluated and not blindly followed. Failure to properly design systems for signal and power integrity can result either in system errors or component damage.
For comparison, these are sample I/V curves of the National 54AC family, known for it's very strong drivers and issues with line termination and ground bounce. Note that the drive currents of current generation 0.25 Ám, MEC-produced SX-S series devices can have higher drive levels than the 54AC components. While 54AC logic devices outputs frequently range from 4 to 8 in numbers, some users of current FPGAs have configured the devices for greater than 150 simultaneous switching outputs (SSOs), a recipe for trouble.
A generation back in discrete CMOS digital IC's is represented by the 54HC family. In these curves of typical data, we see the less robust drivers that permitted moderate length signal runs without treating the signals like transmission lines. Ground bounce effects were also minimal. Data from High-Speed CMOS Logic Data Book, Texas Instruments, 1989.
Prior to the 54HC logic family, spaceborne electronics designers used the CD4000B family for CMOS applications, often at VDD = 10V and sometimes at VDD = 5V. As is seen from the charts below, the drivers today would be considered quite weak and usually did not have signal integrity issues. The weak drivers often resulted in large transition times which could result in hold time problems for parallel clocked circuits that are active on the same edge. Data from RCA Solid State Databook, CMOS Integrated Circuits, SSD-250C.
"High Speed and Signal Quality" - page of relevant information on klabs.org.
"IBIS Models: Background and Usage", Actel Corporation.
"Signal Integrity Central,"XL Building a working system today requires knowledge of a great deal more than just Boolean logic and HDL code. The documents and links in this area are designed to aid in achieving reliable PCB designs.
"Designing For Signal and Power Integrity in FPGA Systems," Mark Alexander, Xilinx, Corp., 2002 MAPLD International Conference, Laurel, MD, September 2002.
"Jitter, Power Integrity," and Proper PDS Design For FPGA Systems," Tim Jaynes, Xilinx Corp., 2003 MAPLD International Conference, Washington, D.C., September 2003.
Actel IBIS ModelsXL
Xilinx IBIS ModelsXL
High-Speed Digital DesignXL, Howard Johnson's www site.
High-Speed Digital Design: A Handbook of Black Magic, Howard W. Johnson and Martin Graham
Home - NASA Office of Logic Design
Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz