February 28, 2006
This document contains information regarding programming software for RTAX-S and RTSX-SU FPGAs. The information is intended to ensure proper programming and the highest possible yield.
Each Actel device has a “silicon signature” area, where manufacturing information is programmed at the factory. In response to customer requests, Actel has recently begun adding information indicating the wafer location of each die to the silicon signature of our RTAX-S and RTSX-SU space-flight FPGAs. The additional information is included for failure analysis purposes and has no effect on the functionality or operation of the FPGAs. Versions of Silicon Sculptor programming software prior to v3.87 (DOS) / v4.50.0 (WIN) will detect the extra information in the silicon signature and reject the devices with a “failed blank check” message.
Starting with v3.87 (DOS) / v4.50.0 (WIN), the Silicon Sculptor programming software will ignore the additional data in the silicon signature. Customers who are intending to program RTAX-S and RTSX-SU devices must use Silicon Sculptor programming software v3.87 (DOS) / v4.50.0 (WIN) or later. Actel’s recommendation is to always use the most recent version of software. This software may be downloaded free of charge from Actel’s website, at https://www.actel.com/custsup/updates/silisculpt/
Note that the v3.87 (DOS) / v4.50.0 (WIN) and later programming software is compatible with both silicon which has additional wafer location information programmed into the silicon signature, and earlier silicon which does not have the additional information programmed into the silicon signature. Therefore, once the programming software is updated, it is compatible with all silicon.
Affected Silicon Products
All Actel RTAX-S and RTSX-SU products will have the additional information programmed into the silicon signature area. To ensure acceptable programming yield, Actel strongly encourages customers to upgrade to the latest programming software. The date of shipment of material with the additional information will vary with device type and package type, and will commence no earlier than 90 days after the date of this letter.
Note: Programming the wafer location information into the silicon signature area is not available for the RT54SX-S (MEC) FPGAs.
For further information please contact the Actel applications department by emailing email@example.com
PCN number: 0603
PCN change level: Major
February 1, 2006
Subject: Programming Software Changes for RTAX-S and RTSX-SU (UMC)
RTAX-S and AX Application Notes
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