NASA Office of Logic Design

PROGRAMMABLE TECHNOLOGIES WEB SITE

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

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User Notes

A Supplement: Special Notices on Various Topics For Specific Devices and Tools


Actel User Notes

HX6256_ttl_notice

The 256K SRAM in the 28 lead flat pack does not provide a satisfactory ground connection for operation in TTL mode for the Read conditions listed in datasheet HX6256.   Toggling the NOE pin coincident with an address change could cause the chip to enter oscillation if all of the inputs are toggled together.


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Last Revised February 03, 2010
Digital Engineering Institute
Web Designer: Richard Katz
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