NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

Independent NASA Test of
Actel SX-A, SX-S, and SX-SU
Field Programmable Gate Arrays (FPGAs)

This page is used for the official dissemination of test status , results, and reports.

Analysis of S/N 50956 After KU1-3A

Summary

The KU1 set of devices was first subjected to two 250 hour test segments at +125 ºC.  These segments are designated KU1-1 and KU1-2.  The third test segment, also scheduled for 250 hours, was at -55 ºC, and is designated KU1-3.  Since the test was interrupted as a result of a safety shutdown, KU1-3 has been divided into two subsegments; KU1-3A will be the designator for the first 115 hours of test and KU1-3B will be the remaining 135 hours in the 250 hour KU1-3 block.  Following KU1-3A the KU1 lot was subjected to an ATE test.  One  unit, S/N 50956, while remaining within specification, was found to have propagation delay deltas that were relatively small in magnitude but out of family.  Testing and analysis are ongoing to determine whether or not the device has a fault, and if so, were chamber transient conditions from the unexpected shutdown a factor.  Note that there are a number of different structures that can produce effects such as an increase in propagation delay; the antifuse is only one such structure.

Discussion

Figure 1 below shows the t_PD distribution after step KU1-3A.  As can be seen from the histograms, the distributions are relatively tight and there are no outliers.  The delay circuit consists of a string of 1,236 inverters.  Both t_PHL and t_PLH are measured by the ATE.

Figure 1: t_PD distribution after KU1-3A (1,236 inverters)

The analysis continues by taking the difference in propagation delays.  This is done both from the initial ATE measurements and from the subsequent step, which in this case is KU1-2.  These measurements are taken at the nominal laboratory temperature, which is approximately 25 ºC.  With an average propagation delay of approximately 1 µs, a 1 ºC change in laboratory temperature will result in a propagation delay change of approximately 2.5 ns.  Additionally, there will be some measurement error inherent in the system, based on ATE repeatability.  To date, the same ATE machine and loadboard were used for each test run.

Two control samples are available from KU1 and one from KU2.  These can be examined to obtain a measure of the noise inherent in the t_PD measurements.  As can been seen from Tables 1 and 2, even for the small number of samples, there is approximately ± 3ns of measurement jitter.  Overall, the population is tending to slow down by approximately 1 ns per test step.  After programming, the devices go through a series of 4 ATE runs, 25 ºC (Step 0A), -55 ºC, +125 ºC, and a final 25 ºC (Step 0B) test run.

Table 1. Control Sample t_PHL

Serial Number	Range	STEP
		0A	0B	1	2	3A
50767 (KU1)	3.30	1005.50	1003.50	1003.25	1002.80	1002.20
50867 (KU1)	5.00	990.00	985.00	987.25	986.00	986.50
54766 (KU2)	3.70	1003.50	1004.50	1007.20

Table 2. Control Sample t_PLH

Serial Number	Range	STEP
		0A	0B	1	2	3A
50767 (KU1)	2.55	1119.75	1118.75	1118.75	1117.80	1117.2
50867 (KU1)	5.50	1109.50	1104.00	1107.50	1105.20	1106.50
54766 (KU2)	5.45	1125.25	1126.70	1130.70

The delta propagation delay for S/N 50956, along with the rest of the KU1 population, can be seen in Figures 2A and 2B, below.

Figure 2A: Delta tPLH Step 2 to 3A	Figure 2B: Delta tPHL Step 2 to 3A

For the KU1-2 to KU1-3A delta t_PLH calculation, S/N 50956 exhibited a change of +9.5 ns.  S/N 50947 has the next highest propagation delay delta, a value of 4.6 ns.  Thus, there is a difference in deltas of approximately 4.9 ns between the two devices.  This is shown in  Figure 2A above.

For the KU1-2 to KU1-3A delta t_PHL calculation, S/N 50956 exhibited a change of +5.5 ns.  S/N 50796 has the next highest propagation delay delta, a value of 3.75 ns.  Thus, there is a difference in deltas of approximately 1.75 ns between the two devices.  This is shown in  Figure 2B above.

Table 3: S/N 50956 History

	Range	0A	0B	Post Step 1	Post Step 2	Post Step 3A
tPHL	6.5	1014.50	1014.75	1014.75	1015.50	1021.00
tPLH	11.0	1132.00	1133.00	1134.00	1133.70	1143.20

 

At this time, these readings and preliminary device analysis are inconclusive.  Additional tests and analysis are being performed to determine if there is a fault and if so, what structure is failing.  This page will be subsequently  updated.

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FIT Rate Calculation: Actel Corporation

The following estimates were provided by Actel Corporation, the device manufacturer.  The estimates will be updated as additional data is obtained throughout the course of the test.

Acceleration Data Fit Rate Calculation

The device FIT rate calculation is based upon two test data sets:

• KU1: 150 units completing 500 Hours at 125 °C; T_J = 148 °C
• KU2: 150 units completing 250 Hours at 125 °C; T_J = 148 °C

Figure 3.  Part Fit Rate for RTSX32SU with Activation  Energies

Acceleration Data: RTSX32SU Worst-Case Lifetime

Based upon 1 failure from 150 units after 500 Hours at T_J = 148 °C:

• 1.4 eV is the established activation energy (E_A) for the MEC antifuse

• 1.6 eV is the current estimate of the E_A for the UMC antifuse

Figure 4. RTSX32SU Minimum Life Time vs. Temperature

Delay Anomaly: Based on preliminary indication of likely fault location.

• Isolated net analysis with Action Probe/Silicon Explorer

  • Suspected S-Antifuse (Semi-direct connect), but not confirmed with manual fuse checker (MFC)

  • Single net found that violates expected delay from static timing analysis

  • Net has a single S-Antifuse only

    • Single S-Antifuse net has the highest peak current for the input class antifuses

    • S-Antifuse is a low programming current antifuse

• Analysis considerations

  • Failed one device out of 300 after extreme hammering

    • KU1: 150 at Hot for 500 hours and Cold for 115 hours

    • KU2: Additional 150 thru 250 hours Hot only

  • The following factors were utilized in the calculations

    • Maximum V_CCA= 2.75V (only increased junction temperature effect)

    • 500 hours @ 148°C T_J

      • Equivalent to ≥ 51 years at 85 °C

  • The following factors were not utilized in the calculations

    • 115 additional hours @ -55 °C T_A (+ increased peak current)

    • Maximum V_CCA= 2.75V (increased peak current)

      • Maximum V_CCA increases the peak current seen in the antifuse by the square of the voltage

    • Approximately -1V (average) I/O undershoot

      • Undershoot characterized at room temperature, will increase at -55 °C

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Introduction to Reliability

Model: Most failure mechanisms can be modeled using the Arrhenius equation:

ttf = C · e^EA/kT

Terms

• ttf - time to failure (hours)
• C - constant (hours)
• E_A - activation energy (eV)
• k - Boltzman's constant (8.616 x 10-5eV/K)
• T - temperature (K)

Acceleration Factors

         ttf_L

A.F. =  ------

         ttf_H

 

A.F. = acceleration factor

ttf_L = time to failure, system junction temp (hours)

ttf_H = time to failure, test   junction temp (hours)

Reference

"Advanced Design: Designing for Reliability"
2001 MAPLD International Conference
Laurel, MD
September 10, 2001

 

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