|PART NAME AND NUMBER:||256K Paged CMOS E2PROM FM28C256|
|SERIAL NUMBER||None (circuit designation KU9)|
|MANUFACTURER:||SEEQ Technology Incorp. (SEQ)|
PART HISTORY: The subject part was noted to fail in the flight hardware during ambient testing. It was reported that the failures were seen during the PROM read/write test. Some failures occurred after a successful write. All failures occurred within a small range of addresses in a single part (the subject part). The failure caused the address being accessed to always have 0's in the data.
The part was delivered to Failure Analysis by R. Menke, Section 507, for determination of the cause of failure.
FINDING: Electrical testing and examination by EMMI (Emission Microscope for Multilayer Inspection) strongly suggest that the failure of the part was due to electrostatic discharge (ESD). However, this was not confirmed by SEM examination as actual damage sites were not visually observed.
1. External Visual Examination: The part was in good condition with no significant observable anomalies. See Figure 1. The following markings were observed on the top of the device:
[delta] C 9133
2. Electrical Tests: The part passed all parametric tests including Vic (Voltage input clamping, Iih (input current at high level) tests on all input pins. The part also passed the Iss test at Vdd = 5 volts. The measured maximum Iss leakage current was 42.5 micro arnps which is within the allowable maximum Iss current (100 micro arnps at Vdd = 5 volts).
3. Internal Visual Examination: Internal optical examination found no significant anomalies.
4. EMMI: After delidding the part was set up for inspection by EMMI. The setup was the same as the above Iss test which measured the Iss current reading of 42.5 micro amps. The EMMI revealed several bright areas at data output driver circuits, see Figure 2. The brightest area appeared at data out pin Q6, see Figure 3.
5. SEM Examination: The part was stripped and the areas identified by EMMI were carefully examined by SEM. No signs of any damage were noted to the metallization, inter-level oxide, polysilicon gates, or gate oxide.
CONCLUSIONS: The electrical testing and examination by EMMI suggest that the failure of the subject part was due to Electrostatic Discharge (ESD), however, this could not be confirmed during the analysis. It is possible that the damage site was too small to be detected during the SEM examination, or that the damage site was located in an area not detectable by EMMI but which was some how partly affecting (turning on) the I/O transistor.
RECOMMENDED ACTION: Handling and assembly procedures, especially those pertaining to ESD and EOS, should be reviewed and corrected to prevent similar occurrences of this type in the future. It is reconnnended that the document "JPL Handbook for Electrostatic Discharge (ESD) Control", JPL D-1348, Rev. A, dated March 1993, be reviewed.
Prepared by: S. Johnson, 7/20/95
Prepared by: D. Vu, 7/20/95
Approved by: E. F. Cuddihy, 7/20/95
Figure 1. Optical photograph of the FM28C256,
as received by Failure Analysis
Figure 2. EMMI image of the FM28C256 die. Three leakage sites
can be seen at the top of the chip (dark spots in the image).
Figure 3. Close up EMMi image of the most significant leakage
area on the die, output Q6.
For additional information see: SEEQ EEPROM Reliability Requirements.
NASA Office of Logic Design
Last Revised: February 03, 2010
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