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A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


1998 Military and Aerospace Applications of

Programmable Devices and Technologies Conference

(MAPLD Conference)

 

PCD6: Joseph M. Benedetto
UTMC Microelectronic Systems, Principal Reliability Engineer

"Reliability Analysis of Programmed UTMC PROMs Following Post-Program Conditioning"

PCD6_Benedetto.pdf

PCD6_Benedetto.doc

Life test data were obtained on the UTMC Microelectronic Systems 64K and 256KBit programmable read-only memories (PROMs) following post-program conditioning (PPC). PPC is used to enhance the reliability (and radiation tolerance) of the UTMC PROMs following programming. To date, the life-test data show a mean time to failure (MTTF) for the 64K PROM of 1,476 years and a MTTF of 369 years for the 256K PROM (using a 60% confidence limit at 55° C). Data collection is continuing and updated reliability numbers will be published, as they become available.

    The UTMC Microelectronic Systems (UTMC) 64K and 256K programmable read-only memory (PROM) uses an amorphous silicon (a -Si) based antifuse. In the unprogrammed state the antifuse has a high resistance, typically >109W . Following programming with a series of voltage pulses, a low resistance filament is created. The UTMC PROMs use a 2-transistor/2-antifuse structure for each cell. Following programming, each cell has one programmed (low-resistance) antifuse and one unprogrammed (high-resistance) antifuse. For reliable operation, therefore, the programmed antifuse must stay in a low resistance state and the unprogrammed antifuse must stay in a high resistance state for the life of the product.
    The reliability of the unprogrammed antifuse structures were determined through a design of experiments (DOE) approach which used accelerated voltage stressing to calculate a failure rate. To determine the reliability of the programmed antifuse a thermally activated test method was used. PROMs were programmed with an "AA55" pattern (considered a worst case test pattern for these devices), conditioned with 64 hours of unbiased bake followed by 64 hours of voltage stressing. The combination of unbiased bake and voltage stressing following programming is called post-programming conditioning (PPC). The conditioned PROMs were then subjected to an extended life test at 150° C with a 5.5V dynamic stress pattern. The details of the PPC followed by the life-test results are discussed in the final paper


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