NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


2003 MAPLD Technical Program

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 9-11, 2003

Session D. Processors: General Purpose and Arithmetic

Wednesday, September 10, 2003

Richard Katz, NASA Office of Logic Design
Session Chair: Rich Katz - NASA Office of Logic Design

11:15 am Paper D1
"Digital Signal Processing at 1GHz in a Field-Programmable Object Array"
Dirk R. Helgemo
MathStar, Inc.
Abstract: helgemo_a.pdf, helgemo_a.doc
Presentation: d1_helgemo_s.ppt
Paper: d1_helgemo_p.pdf, d1_helgemo_p.doc
12:05 pm Paper D2
"SIMD 2-D Convolver for Fast FPGA-based Image and Video Processors"

Stefania Perri1, Marco Lanuzza1, Pasquale Corsonello2 and Giuseppe Cocorullo1
1
Department of Electronics, Computer Science and Systems, University of Calabria
2 Department of Computer Science, Mathematics, Electronics and Transportation, University of Reggio Calabria
Abstract:
perri_a.pdf
Presentation: d2_perri_s.ppt
Paper: d2_perri_p.pdf, d2_perri_p.doc
12:30 pm Paper D3
"FPGA Redesign of a Microprocessor-based Subsystem With No Impact to the Mission Software"
Keith Bergevin
Defense Microelectronics Activity
Abstract: bergevin_a.html, bergevin_a.pdf, bergevin_a.doc
Presentation: d3_bergevin_s.ppt, d3_bergevin_s.pdf
12:55 pm

Lunch In The Pavilion

and

Session F - Birds of a Feather: Reconfigurable Computing (in the Amphitheater at 1:45 pm)

2:25 pm D0: Invited History Talk: Roger D. Launius, Smithsonian Air and Space Museum
"After Columbia: How We Got into this Fix and How We Can Get Out of It"
Presentation: d0_launius_s.ppt
Videos: DivFix.STS-107.LaunchReplay.Tower1.avi
STS-107.Debris.ET208.avi
STS-107.Debris.ET208.slow.avi
STS-107.Debris.ET212.avi
STS-107.Debris.ET212.slow.avi
STS-107.LaunchReplay.OTVCamera060.avi
STS-107.LaunchReplay.Tower1.avi
3:55 pm BREAK In The Amphitheater Lobby

Dedicated Poster Session

4:35 pm Paper D4A
"Why Software Is So Hard"
Nancy Leveson
MIT
5:00 pm Paper D5
"Floating-Point Mathematical Co-Processor for a Single-Chip On-Board Computer"
Tanya Vladimirova, David Eamey, Sven Keller, Martin Sweeting
Surrey Space Centre, School of Electronics and Physical Sciences, University of Surrey
Abstract: vladimirova_a.html, vladimirova_a.pdf
Presentation: d5_vladimirova_s.ppt, d5_vladimirova_s.pdf
Paper: d5_vladimirova_p.pdf
5:25 pm Paper D6
"Architecting Wide-bit Multipliers on Programmable Logic Devices"
J. P. Davis, S. Devarkal, N. Sontineni
Department of Computer Science and Engineering, University of South Carolina
Abstract: davis_a.pdf
Presentation: d6_davis_s.ppt
5:50 pm Paper D7
"Flexible Arithmetic Components for Area-Efficient Fault Tolerance"
Vinu Vijay Kumar and John Lach
University of Virginia
Abstract: vijaykumar_a.pdf
Presentation: d7_vijaykumar_s.ppt
Paper: d7_VijayKumar_p.pdf, d7_vijaykumar_p.doc
6:15 pm Trivia Contest and Conference Banquet with Jazz during dinner by Jacob Yoffee
Wednesday Evening, September 10.

Panel Session - x:xx pm until ...

Why Is Software So Hard?

A Discussion of the Technical, Programmatic, and Political Factors

That Have Lead To Failures Over the Last 40 Years and it's Impact for Future Systems

Panel Moderator: Rod Barto (Bio)

Introduction:
James Tomayko,
Carnegie Mellon University (bio)
Paul Cerruzi, Smithsonian National Air and Space Museum (bio)

Opening Case Studies: Magellan and Mars Pathfinder
Tony Spear, Jet Propulsion Laboratory (bio)


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Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz
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