NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2003 MAPLD Technical Program

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 9-11, 2003

Session B. Systems and Design Tools

Tuesday, September 9, 2003

Session Chairs
Tanya Vladimirova, University of Surrey
Hans Tiggeler

 

2:25 pm		Paper B1 "Giving Friend and Foe Advanced Technology: Intellectual Property in Military and Aerospace Programmable Logic Devices" Kathleen M. Kaplan1 and Lt Col John J. Kaplan2 1Registered Patent Agent, United States Patent & Trademark Office and Department of Systems & Computer Science, Howard University 2Commander of the 694th Support Squadron, USAF Abstract: kaplan_a.pdf, kaplan_a.doc Presentation: b1_kaplan_s.ppt
2:50 pm		Paper B3 "A Methodology for Optimized FPGA Design of Signal Processing Kernels" Zachary K. Baker and Viktor K. Prasanna University of Southern California Abstract: baker_a.pdf Presentation: b3_baker_p.ppt Paper: b3_baker_p.pdf
3:15 pm		Break In The Pavilion; Dedicated Industrial and Government Exhibits
4:45 pm		Paper B5 "Power-Efficient Adaptable Wireless Sensor Networks" John Lach, David Evans, Jon McCune, and Jason Brandon University of Virginia Abstract: lach_a.pdf Presentation: b5_lach_s.ppt Paper: b5_lach_p.pdf
5:10 pm		Paper B6 "Jitter, Power Integrity, and Proper PDS Design For FPGA Systems" Tim Jaynes Xilinx, Inc. Abstract: jaynes_a.html, jaynes_a.pdf, jaynes_a.doc Presentation: b6_jaynes_s.ppt Paper: b6_jaynes_p.pdf
5:35 pm		Paper B7 "Creating Parameterized and Energy-Efficient System Generator Designs" Jingzhao Ou, Seonil Choi, Gokul Govindu, and Viktor K. Prasanna EE - Systems, University of Southern California Abstract:  ou_a.pdf, ou_a.ps Presentation: b7_ou_s.ppt Paper: b7_ou_p.pdf
6:00 pm		End of Day 1

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