2000 MAPLD International Conference
September 26-28, 2000
Session D Photos
SoC, Synthesis, and IP

Session Chair
Hans Tiggeler, University of Surrey
Grunt Engineer, Apprentice


D1: Software Support for the Integration of Reconfigurable Computing with Networks of
Workstations
Miriam Leeser1, Elias Manolakos1, and Reid Porter2
1Dept of Electrical and Computer Engineering, Northeastern University
2Space and Remote Sensing Sciences Group, Los Alamos National Laboratory


D2: Adaptive Management of Computing and Network Resources for Spacecraft Systems
Barbara Pfarr and Ryan Detter
Real-Time Software Engineering Branch, NASA Goddard Space Flight Center
D3A: Concurrent Error Detection Architectures for Symmetric Block Ciphers
R. Karri, Y. Kim, P. Mishra and K. Wu
Department of Electrical Engineering
Polytechnic University
D4A: Algorithm LEVEL RE-computing with Shifted Operands - A Register Transfer Level
Concurrent Error Detection Technique
Kaijie Wu and Ramesh Karri
Department of Electrical Engineering
Polytechnic University
D5: Designing and Testing a Radiation Hardened 8051-like Micro-controller
Fernanda Gusmao de Lima
Federal University of RGS
D6A: CDMA and Hopfield Neural Nets in FPGAs
R. Patterson and I. Jouny
Dept. of ECE, Lafayette College
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