Evolvable Hardware for Extreme Environments: 
Expanding Device Operational Envelope through Adaptive Reconfiguration 

A. Stoica, D. Keymeulen, R. Zebulum, Y. Jin(2) and V. Duong
Jet Propulsion Laboratory, California Institute of Technology
    Pasadena, CA 91109
(2) California Institute of Technology, Pasadena, CA 91106

Abstract

Future NASA/JPL missions target environments with extreme temperatures.
For example, on Venus the electronics need to operate at about 470 degC.
According to recent opinions (1999 NASA/JPL Conference on Extreme 
Electronics) hot electronics technology for > 400degC environments may
not be ready in time for ‘06-‘07 missions, except possibly for 
grab-and-go or limited life operations. All current approaches to
electronics for extreme environments rely on a fixed design. Most 
focus is on component level robustness and hardening (including here 
material selection, etc.), however circuit solutions have also been
employed, for example, bias cancellation circuits for compensation. 
This paper proposes a totally novel approach, which relies not on 
single design, but adaptive, in-situ circuit redesign/reconfiguration 
during the operation in the environment.  This approach would 
complement those relying on material/device advancements and will
bring closer the success of missions in harsh environments.  The
technique relies on adaptive reconfiguration to compensate the 
deviation of device characteristics from those used in the original
design. The main idea is to adaptively reconfigure the electronics to 
automatically determined configurations that match the altered component
characteristics in a better way than the original circuit configuration. 
Reconfiguration is approached here using evolutionary algorithms. A
variety of circuits has already been synthesized this way. For example,
Koza used Genetic Programming (GP) to grow an embryonic circuit to one
that satisfies desired requirements. This approach was used for evolving
a variety of circuits, including filters and computational circuits. 
On-chip evolution was demonstrated first by Thompson using a Field 
Programmable Gate Array (FPGA) as the programmable device, and a Genetic 
Algorithm (GA) as the evolutionary mechanism.  While the approach has a
wide applicability, the demonstration here is limited to analog 
electronics, high temperature, and bulk silicon (one can similarly
extend limits of other materials, more suitable for high temperature).
When the temperature increases the characteristics of transistors and 
other on-chip components modify. As component characteristics change the
original design (interconnection of components) looses optimality and a
different component arrangement may be able to provide a better circuit 
solution. To be effective in practice this approach requires a 
reconfiguration capability at the most intimate level. A JPL-designed
CMOS Field Programmable Transistor Array (FPTA) reconfigurable at
transistor level was used as a test platform. The FPTA is reconfigured
under the control of evolutionary algorithms.  Experiments illustrate 
how circuit responses altered by the increased temperature are 
recovered through evolutionary reconfiguration. At the time of this
abstract this recovery has been demonstrated for 150 degC in simulations
and is now tested with the chips.  Further experiments will continue at
higher temperatures and for different durations of exposure. The paper
will report the results of the application of the technique up to around
250 degC.  

This paper is organized as follows: Section 2 presents an 
evolution-oriented architecture for reconfigurable hardware based on 
the concept of Field Programmable Transistor Array. Section 3 presents
automatic synthesis of an electronic circuit by intrinsic evolution 
(on FPTA chips). Section 4 describes a set of experiments in which 
functionality is recovered after being deteriorated/altered by increased
temperature. Section 5 presents a discussion and future work and section
6 concludes the paper.