NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


2006 MAPLD International Conference

Ronald Reagan Building and International Trade Center
with a session at the Smithsonian National Air and Space Museum

Washington, D.C.

September 26-28, 2006

Tom Fitzpatrick, Seminar Leader, Mentor Graphics Corporation

Tom Fitzpatrick
Verification Technologist
Mentor Graphics Corporation

Biography

Tom is currently a Verification Technologist at Mentor Graphics Corp. where he brings over two decades of design and verification experience to bear on developing advanced verification methodologies, particularly using SystemVerilog, and educating users on how to adopt them. He has been actively involved in the standardization of SystemVerilog from its inception, starting with his days as a member of the Superlog language design team at Co-Design Automation through its standardization via Accellera and then the IEEE, where he has served as chair of the 1364 Verilog Working Group, as well as a Technical Champion on the SystemVerilog P1800 Working Group. He has published multiple articles and technical papers about SystemVerilog, assertion-based verification, functional coverage, formal verification and other functional verification topics. Tom is also the Technical Program Chair for the annual Design and Verification Conference (DVCon), to be held in February, 2007, in San Jose, CA, and is a frequent and popular tutorial presenter at that conference.


Seminars: 2006 MAPLD International Conference

2006 MAPLD International Conference Home Page


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