"Rapid Painless Prototyping of Actel FPGA Devices"

Dave Rinehart1 and Ravi Pragasam2

1Aldec Corporation
2Actel Corporation

Abstract

Typical hardware designer faces numerous challenges when he tries to create first working prototype of his brand, new design. He has to develop new printed circuit board or pick one of the general-purpose prototyping boards available on the market. This can problematic, since large designs may require multiple FPGA devices on one board and support for some flexible, highly-configurable bus interconnects them. In extreme cases logic multiplexing must be implemented to provide required number of connecting signals. External interface of the board is also a problem: it must be fast enough to ensure efficient monitoring and debugging of the prototype design. This requirement is especially important if the hardware on the board has to talk to the software residing in the personal computer.

The paper presents first solution for prototyping designs implemented in ACTEL FPGAs that uses Aldec’s Hardware Embedded Simulation (HES) technology.

This solution is able to solve the majority of prototyping related issues and allows quick migration from RTL to bug-free prototype model. The entire setup process, including incremental synthesis of the design, its automatic partitioning, probing signal selection, software interface connection, and final place-and-route is controlled within a single IDE. HES solution is based on original PCI cards with the largest Actel ProAsic3 device on it that can be used individually, in groups, or mixed with other boards. Incremental prototyping implemented in HES facilitates moving the design from RTL simulation to hardware prototyping.  No matter how many design modules are still in RTL model and how many are ready for implementation, HES allows simulation of the entire system, providing perfect balance of co-simulation speed and design details visibility.

 

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