"Lessons Learned Implementing the VSIPL API on Reconfigurable Computers"

Robin Bruce1, Malachy Devlin2, and Stephen Marshall3

1Institute for System Level Integration
2Nallatech Ltd.
3University of Strathclyde

Abstract

It is now recognised that FPGA-based reconfigurable computers have the potential to significantly outperform microprocessors both in terms of GFLOPS per device and GFLOPS per watt. Among the most significant impediments to achieving this performance has been limited programmability. Implementing FPGA-based reconfigurable computing applications has previously closer resembled classic electronic design than it has programming and this has prevented wider investigation of the potential benefits of reconfigurable computing. Application developers rarely have the necessary experience to design for FPGAs and conversely FPGA designers often lack the application experience required. Application programming interfaces (APIs) are seen as a way in which FPGA designers can abstract the complexities of design to the extent that they are invisible to the application programmer. An API that combines significant abstraction with the performance that FPGA-based computing can bring would be of significant interest to the high-performance computing communities, both embedded and otherwise. 

The API investigated in this project was the Vector, Signal and Image Processing Library (VSIPL). This is an API that has been developed principally by the US Navy to give application developers a standard development environment across development platforms. 

The authors present the conclusions after one year of research. The conclusions are that reconfigurable computers are still too immature for the implementation of a standard API such as VSIPL to be effective. Reasons given for this include memory management, data transfer bandwidths and latencies as well as the limited reconfigurable real-estate versus the theoretically infinite options of software. These limitations force tradeoffs between standards compliance, performance and abstraction. An alternative library-based approach to reconfigurable computing is advocated that provides high performance and abstraction at the expense of standards compliance and total abstraction. Implementation results of a math library that targets FPGAs via a high-level language compiler are presented.

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