"Micro-Inspector Avionics Module (MAM): A Self-Contained Low Power, Reconfigurable Avionics Platform for Small Spacecrafts and Instruments"

Mohammad Ashtijou, Yutao He, R. Kevin Watson, and Gary S. Bolotin
Jet Propulsion Laboratory


This paper describes development of a radiation tolerant, low power, reconfigurable avionics module aimed at meeting the avionics needs of the JPL Micro-Inspector spacecraft. This module represents a complete avionics system, consisting of  two  PowerPC 405 CPUs embedded within a reconfigurable FPGA fabric of over 8 Million logic gates, 64MB of EDAC protected Flash storage and 128MB of EDAC protected DDR SDRAM or SDRAM memories, along with FPGA SEU mitigation logic, and all necessary power conversion. Processor SEU mitigation is achieved by running the two processors in a lock-step and compare configuration. All of these building blocks are integrated into a double sided circuit board that takes as little as 6 square inches of board space.  This module can be embedded into a user system as part of a bigger circuit assembly or as a self contained module.  This module is being developed as part of a JPL led Micro-Inspector Program, funded by NASA ESMD aimed at producing a 10 kg micro spacecraft.  

The following table summarizes the Avionics hardware and software capabilities of the board. The Micro-Inspector project and the Avionics are discussed further in the full paper. 

Board Footprint:   5 x 6
Board Mass:     200 grams
Processor:   Xilinx Virtex II Pro XC2VP40 FPGA with two Power PC405 CPUs

192 MB (32Mx48) DDR SRAM, 96 MB (16Mx48)  Solid State NOR Flash for mass storage, and 192 MB (32Mx48) SDR SRAM. All three have 16-bit additional data bits for error detection and correction (EDAC) capability.

Serial Interfaces:    Fast Ethernet, RS232

EDAC (single error detection, double error correction
Flash File System

Software capability:    Linux operating system
Electrical:             10-24 V input with about 3 W power consumption


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