“Universal Input Buffer for Programmable Logic Devices”

Vladimir Bratov1, Jeb Binkley1, Vladimir Katzman1, Andrey Bratov1, and Glenn Rakow2

1Advanced Science and Novel Technology Company
2NASA Goddard Space Flight Center

Abstract

Programmable logic devices and systems require reconfigurable or universal interconnects for easy linking together of different parts and blocks, which are often missing a common electrical ground. The existing variety of standards for the digital interconnect physical layers complicates the achievement of full compatibility vital for hardware-independent device programming. All existing input/output buffers utilize different termination schemes, different voltage swings, and different DC offset voltages, which does not help to make them compatible with each other.

This paper presents an example of a successful application of a BiCMOS technology to the design of a universal input buffer. The device accepts differential signals with any DC offset voltage between the negative and positive power supply rails and provides a sensitivity of about 40mV without any external reconfiguration. It can also process single-ended signals with a predefined switching threshold voltage. The required termination scheme and/or threshold voltage can be programmed using external control signals. The buffer’s output signals are fully compatible with either 3.3V CML or 3.3V/1.8V CMOS voltage levels. The buffer is power conserving and operates at data rates up to 1Gb/s with a nominal current consumption of less than 300μA. It is designed as a standard block and can be easily incorporated into new designs utilizing the same or similar technological processes.

 

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