“Design of a Managed FPGA for Secure and Sustainable Processing in Military Applications”

Jason Sattler1, Matt Leftwich1 and Robert L. Riley, Jr.2

1Space Photonics, Inc.
2Air Force Research Laboratory


The Performance Enhanced Managed Field Programmable Gate Array (PEM-FPGA) is a system component that contains an FPGA, microprocessor, and security features, packaged within a multi-chip module that provides important services, such as dynamic partial reconfiguration, defragmentation, and bitstream decryption. These features allow for the enhanced FPGA to be a secure, sustainable, upgradeable and malleable component for use in a wide variety of defense applications. Innovations include the use of a microprocessor to manage the FPGA, perform full and partial reconfiguration, defragmentation, and security functions. The algorithms running on the microprocessor are implemented in C++, easing the upgrade and maintenance cycle as new techniques become available. Further, the final PEM-FPGA device can be feasibly manufactured such that it results in a drop-in replacement for current COTS FPGAs, eliminating costly test system redesign.

Keywords: FPGA, microprocessor, defragmentation, reconfiguration, partial reconfiguration, memory management, bitstream encryption, anti-tamper


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