“Configurable Satellite Data Handling Architecture based on System-on-Chip Technology”

Albert Lin and Jer Ling
National Space Organization, Taiwan


To provide a low-cost and reusable solution for satellite data handling architecture, the System-on-Chip technology is implemented into FPGA. The configuration of micro-processor and peripheral devices can be selected for different missions based on modular design.

In this paper, our approach and technical developments is described to provide the solutions of the configurable satellite data handling system. The configurable LEON3 processor is implemented on the space qualified and radiation tolerant Actel RTAX2000S FPGA. The SpaceWire link is selected to provide a high speed data handling infrastructure. The board level redundancy cross on-board computer box can be achieved via SpaceWire router or multiplexer. The speed performance in this architecture is discussed. This architecture allows design reuse and can be promoted for future missions.


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