"Generating Non-correlated Streams of Pseudo-Random Numbers in Reprogrammable Hardware"

 Isaac Johnston and Andrew Strelzoff
University of Southern Mississippi


Monte Carlo Simulation is one of the most important and widely used techniques in Scientific Computing. It is estimated that one half of all super-computer cycles are consumed in Monte Carlo simulation. Monte Carlo is an attractive target for acceleration in Field Programmable Gate Arrays (FPGA) because it is simple to parallelize. The designer creates a hardware implementation which will generate one “scenario”. Multiple copies of the computational cell then generate multiple scenarios in relatively few clock cycles. A requirement for parallel Monte Carlo is multiple streams of uncorrelated pseudo-random numbers.

For traditional cluster-based parallel processing, SPRNG (Mascagni, Florida State, http://sprng.cs.fsu.edu/) is the most widely used package for generating non-correlated streams of pseudo-random numbers. Our project is essentially to develop SPRNG for reprogrammable hardware. The aim is develop a package of pseudo-random number generators which are non-correlated, parameterizable to the number of desired generators, polymorphic in that the package will support random numbers of any number of bits, compact in hardware and most importantly convenient and easy to use. We will present our results and a comparison of the generation rates achieved with a variety of FPGA systems and with more traditional clusters and super-computers.

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