"Topics to Consider When Analyzing a Flight FPGA Design”

Michael J. McDonnell
Ball Aerospace & Technologies Corporation


This paper will present various topics that should be analyzed before a flight FPGA is programmed.  Flight FPGA devices are expensive parts and need to be designed right the first time.  Performing a thorough analysis is a must.  This paper will talk about the following concepts:

Safe State Machines

Global Reset Circuit Synthesis Pitfall

Clock Skew in Routed Clocks

Actel's SmartTime Static Timing Analysis (STA) Tool

Reports and Constraint Files from Actel’s Designer Tool

Adding the previous design analysis topics to your design checklist will help to achieve first pass success of your flight FPGA design.


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