"A Radiation-Hardened, Fast-Turn, Low-NRE-Cost Structured ASIC"

Richard S. Flores
Sandia National Laboratories

Abstract

System developers in government, military, and aerospace markets seek IC solutions which are both economically and technically sound. Despite low production volumes, it is still necessary to maintain component costs as low as possible. Despite long development cycles it is still important to minimize time to market. Despite the offshore movement of foundries and suppliers, it is often necessary in certain security applications to maintain trustworthy sources. Military and aerospace IC applications typically have additional requirements of high-reliability, operation in high consequence applications, long operational lifetimes, and radiation hardness. In an effort to address these issues for internal system applications, Sandia National Laboratories (SNL) has developed a radiation-hardened structured ASIC platform, designated as VA260.

This paper discusses the design and development of Sandiaís VA260 Structured ASIC. The VA260 is implemented in SNLís 0.35micron, 3.3v, radiation-hardened, CMOS-SOI technology. The platform offers 260K logic gates, 354K bits of SRAM, 352K bits of ROM, an on-chip oscillator, and 170 configurable I/O.The chip architecture is based on pre-defined, pre-characterized logic tiles. Base wafers are pre-fabricated through metal-2. User designs are customized at the via-2 layer. The remaining standard metal layers can be quickly fabricated. Parts are then tested, packaged, and made available to the user at a reduced cost and time versus a typical standard cell design flow.

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