"Libraries of Hardware Macros for Reconfigurable Computers"
Tarek El-Ghazawi1, Kris Gaj2, Duncan Buell3, Proshanta Saha1, Esam El-Araby1, Chang Shu2, Miaoqing Huang1, Mohamed Taher1, and Alan Michalski3
1The George Washington University
2George Mason University,
3University of South Carolina
The success of reconfigurable computers, as a viable alternative for traditional parallel computers, depends on the existence of comprehensive libraries of hardware macros capable of running on Field Programmable Gate Arrays (FPGAs), and offering significant speed-ups compared to state-of-the-art microprocessors.
Over the last two years, a comprehensive set of hardware macro libraries have been developed as a joint effort by the George Washington University, George Mason University, and the University of South Carolina. Our set includes eight user libraries and over 50 hardware macros. The libraries provide users with the collections of elementary functions, suitable for a wide range of applications, with the special focus on image processing, cryptography, and bioinformatics.
In the area of image processing, the macros include implementation of Discrete Wavelet Transform, Correlation and Histogram, Delay windows, VSIPL convolution and discrete-difference functions, etc. In the area of cryptography, the libraries cover selected secret key cryptosystems (encryption, decryption, and breaking), binary Galois Field arithmetic in polynomial basis and normal basis, Elliptic Curve Cryptography over binary Galois Fields, and the RSA cryptosystem. In the area of bioinformatics, the libraries cover the Smith-Waterman local sequence alignment algorithm. Additionally, several general-purpose libraries, such as sorting, and bit matrix multiplication have been developed.
All macros, have been implemented in VHDL or Verilog, thoroughly tested, characterized in terms of performance and approximate resource usage, and fully documented. Each macro is accompanied by the corresponding code written in pure ANSI C, capable of performing the same function on a general-purpose microprocessor. A potential speed-up vs. Pentium 4 microprocessor has been determined for most complex macros.
In the current version, the libraries are suitable for use on SRC computers within the SRC Carte environment. In the SRC programming model, the hardware macros can be called from a high level language, C or Fortran, and each macro call will correspond to one instantiation of the corresponding hardware component.
In the near future, an attempt will be made to port our libraries to other reconfigurable computers and their programming environments.
During this presentation, the authors will make an announcement about the release to the general public of the binary version of the GWU/GMU/USC libraries targeting the SRC machines.
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