"Development of a High-Speed Multi-Channel Analog Data Acquisitioning Architecture"

Linda M. Björk
Southwest Research Institute


As the measurement techniques in the space science community rapidly evolve, the demand for multi-channel, high speed, radiation tolerant data acquisition systems get increasingly higher. The high volume of data, the resolution requirements for science data, and the complexity of the in-situ processing and analysis requirements have triggered the need for faster, smaller, and easily reconfigurable designs. In particular, the need for a high-speed multi-channel analog data acquisition system that can perform DSP functions and employ analog shaping is a widespread need for spacecraft and instrument computers. Instrument applications for this type of a system can range from a high-energy detector analog pulse, to a video input, to sound information. In general, possible applications are to any type of instrument whose output is an analog waveform where the science is related to a characteristic of the analog waveform, such as pulse height, rise time, and area of the pulse. Historically, these types of systems have been burdened with the use of multi-channels through multiplexers and the use of slow analog to digital converters. Because of that, these older systems have been forced to perform all the required processing in the initial analog stage and later in a CPU calculation, reducing reconfigurability and adding overhead.

In response to the demand to improve the speed, reconfigurability, and multi-channel capabilities of an analog input data acquisition and processing system, Southwest Research Institute has developed a new design architecture. This new architecture was developed conceptually and then implemented on the NASA Gamma-ray Large Area Space Telescope Digital Processing Unit. This new architectural design can easily be reconfigured for other analog data acquisition DSP applications and spacecraft requirements. This architecture can perform low noise, high speed, analog input processing with the ability to implement pulse shaping, real-time DSP of the digitized form of the analog input waveform, data compression, data formatting, and data throttling of the information to a multitude of interfaces. The data transmission interfaces can be MIL-STD-1553B, LVDS, RS422, CPU processing, and CCSDS packetization. One factor that has played a major roll in this development is the availability of a radiation tolerant ADC. This ADC is a flash-based pipelined ADC with speeds up to 10MSPS with single-ended and differential-ended input capabilities down to 20mV noise levels and 14-bit resolution.

This paper presents an architectural view of this high-speed multi-channel analog DSP processing architecture and gives examples of the tremendous versatility of the design. It also addresses the evolution of these type of analog DSP systems in general and emphasizes the advantages and tradeoffs between today’s approaches versus older heritage methods.


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