NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2004 MAPLD International Conference

Ronald Reagan Building and International Trade Center
Washington, D.C.

September 8-10, 2004

Jim Lewis
SynthWorks Design Inc.

Jim Lewis, the founder of SynthWorks, has seventeen years of design, teaching, and problem solving experience. In addition to working as a Principal Trainer for SynthWorks, Mr. Lewis does ASIC and FPGA design, custom model development, and consulting.

Mr. Lewis was previously employed with Zycad's Protocol division where he worked as an on-site VHDL trainer, methodology consultant, and ASIC designer. As a representative from Zycad, he provided VHDL training, methodology consulting, and ASIC design for Lockheed Sanders in their development of 22 ASICs for the F22 program. On another assignment for Zycad, he worked as a VHDL trainer, Synopsys synthesis trainer, problem solver, and ASIC designer for SGS Thomson in their development of a 125K gate Video Codec chip. In addition to other responsibilities, Mr. Lewis acted as an on-site focal point for resolving VHDL synthesis issues for both companies.

Mr. Lewis was also employed by TRW where he designed ASICs, FPGAs, and worked as a member of their VHDL Methodology Development Group.

Mr. Lewis, who holds a BSEE/BSCEE and MSEE from Purdue University, is a member of the IEEE and the Eta Kappa Nu, and Tau Beta Pi Honor Societies. Mr. Lewis is a member of the Pilot group that developed the IEEE P1076.6 Standard for VHDL Register Transfer Level Synthesis.

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