"Graphical Design Environment for a Reconfigurable Processor"

Gregory Donohoe1, Tu Le1, David Buehler1, and Pen-Shu Yeh2
1 University of Idaho
2 NASA Goddard Space Flight Center


The Field Programmable Processor Array (FPPA) is a new reconfigurable architecture that promises high-throughput, low-power data processing for spacecraft instruments. This paper describes a graphical design environment based on Simulink which will simplify FPPA programming for algorithms designers and spacecraft instrument engineers.

The Field Programmable Processor Array is a derivative of the Reconfigurable Data Path Processor developed by NASA/GSFC and the University of Idaho under ESTO funding. Built on a radiation-tolerant process, the FPPA is one of the few processors designed specifically for reconfigurable computing.

The FPPA implements a synchronous data flow computational model, which is not easily captured in procedural languages like C, but is easy to represent graphically. This motivates our Simulink-based design environment for the FPPA. In a process familiar to all Simulink users, the algorithm designer selects functional blocks from the menu, places them on a work screen, and connects them by drawing interconnect lines. A click of a button executes the simulation. The goals of this effort are to implement the following:

  1. Verify algorithm This is the familiar Simulink operational mode, which runs the simulation, invoking underlying Matlab functions and verifying the functional correctness of the program.
  2. Translate to FPPA. Incorporating design parameters such as value ranges and topology, the software will translate the floating point Matlab representation to fixed point in an optimal fashion, and generate an interface to the FPPASim simulator software.
  3. Verify the FPPA implementation. The designer now executes a simulation that invokes the FPPASim program, which faithfully duplicates the FPPA behavior.
  4. Generate FPPA code. When the implementation has been verified, the software will map the design to FPPA configuration and run-time code, enabling the design to be ported to FPPA chips.

This talk present background on the FPPA, introduce the graphical design environment, and demonstrate two spacecraft instrument applications programmed and simulated using this software.


2004 MAPLD International Conference Home Page