NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.


SWAS Multi-Chip Memory Module

The Submillimeter Wave Astronomy Satellite (SWAS) program was the third in the NASA Small Explorer series of spacecraft.  The project contracted with Texas Instruments to develop a high-density solid state SRAM-based memory module.

Each 10 megabyte module had 2 independent 5 megabyte banks, configured in a 1M x 40 bit arrangement.  The die were Hitachi 128k x 8 static RAM (SRAM) that were first processed, then assembled into stacks.  The die were first thinned and then stacked into blocks of 8 and then assembled onto a substrate with buffers to make a complete assembly.  Each module had 80 static RAM chips in a ceramic quad flatpack whose footprint was 2.18 x 2.05 square inches with 308 I/O leads.


Memory module without the lid, showing the stacks
of static RAM die.  80 SRAMs are packaged into 1 module.

The result was, what looked to the system, as a single component, which was then assembled onto memory boards using conventional techniques.


Two sides of assembled flight memory cards.  In these pictures,
11 memory modules are seen in the flight lidded configuration.

 

For more information please see:

Submillimeter Wave Astronomy Satellite (SWAS) Home Page

Small Explorer's Web Site


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Last Revised: February 03, 2010
Digital Engineering Institute
Web Grunt: Richard Katz
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