NASA Office of Logic Design

NASA Office of Logic Design

A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

2.2.1 System Organization

(1) Central vs Dedicated Systems

There are two extreme approaches to the design of spaceborne computer systems. One approach favors the use of highly reliable, large central data processors to control and process several subsystems on the entire spacecraft. The opposing approach favors the development of small yet flexible, low power, dedicated processors where the ratio of processors to computational functions in any given spacecraft is equal to or greater than one. Large-scale integration (LSI) and complementary metal oxide semiconductor (MOS) technology are making the development of such small programmable processors possible (ref. 27).

There are two major advantages in using one or more small processors per function. One advantage is the ability to integrate subsystems with their computers at an early test stage, and to avoid interferences with other subsystems as might happen in a shared computer. Having its own processor permits the experiment freedom to be flown on different missions without the difficulty of interfacing with each unique spacecraft processor, since only one experiment to processor interface need be designed. Although interfacing with telemetry cannot be avoided, this is much simpler than interfacing with a central processor. Reliability is another advantage since, with a collection of small decentralized processors, a failure may not jeopardize the entire mission of the spacecraft. The major disadvantages of the decentralized approach are that problems of information exchange and coordination are left unsolved, and error control is difficult to achieve.

The alternate concept of a wholly centralized computer solves many of the information exchange and coordination problems, but creates another in the number and diversity of its interfaces with all the sensors and effectors; and it poses a large challenge to fault-tolerant computer and system design (ref. 28).

A comparison of the two approaches, which was made for an example of an orbital mission to Mars in the early 1970s, is discussed in reference 29. The conclusions indicated that the anticipated functional requirements only lightly load the capacity of a general-purpose computer, and that the effect of economics in power, weight, and size for a centralized approach does not fully offset the inherent reliability of the decentralized concept. However, another study (ref. 18) found that a scientific spacecraft telemetry system utilizing a centralized computer is desirable over the decentralized processing approach, even for small satellites with only a few telemetry experiments.

A compromise between the two extremes which seems to combine their advantages is a distributed system, where information processing is done at various levels (ref. 28). The level at which a particular process takes place is almost entirely a function of the sophistication, reaction time, and bandwidth requirements associated with the process. A central computer is best suited to processes whose data-rate requirements are not severe, but whose sophistication is high in terms of program complexity and/or multiplicity of information sources and destinations. A dedicated computer is correspondingly appropriate for high bandwidth processes with limited complexity.


(2) Computer Configuration

Although there are innumerable ways of configuring a computer system, all win contain one or more of each of the following units, plus the communication and data paths required to interconnect them (ref. 30):

A variety of system configurations have been designed, developed, and flown. Figure 1 shows the conventional single processor or uniprocessor system; the processor (P) is connected to the memory (M) and to the I/0 controller (I/0), which may also be connected directly to the memory. The connections of the I/0 controller to I/0 devices, and the I/0 devices themselves, are not shown in the figure.

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Nearly all spaceborne computers which have been flown to date have been uniprocessor systems, either with or without the direct access channel between I/0 and memory. These include the computers on the Gemini spacecraft, the Apollo command and lunar modules, and the Atlas, Minuteman, Titan, Agena, Centaur, and Saturn launch vehicles.

A multicomputer system is shown in figure 2. The processors and memories are not necessarily identical since they are generally assigned different tasks to perform. This configuration is distinguished from a multiprocessor system in that the processors do not share memory. They may communicate directly or via a channel-to-channel adapter which makes each computer look like an I/0 device to the other. The two systems may also share I/0 devices, such as disk storage. The multicomputer configuration has been used in numerous ground based applications, such as the IBM direct-coupled 7094/7044, and in airborne systems, such as the F-111 Mark II Avionics System (ref. 31). During the latter phase of the X-15 program, a multicomputer system was flown on the No. 3 vehicle. A second computer was added to perform energy management calculations; it communicated with the Alert computer through a special I/0 adapter. In the AGC design, provision was originally made for direct communication between the command module and lunar module guidance computers; however, this was never implemented. The Hamilton Standard Modular Flight Computer (ref. 32) is a breadboard multicomputer configuration which was originally designed for the Advanced Kickstage booster.

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The general architecture for a symmetrical multiprocessor configuration is shown in figure 3. The distinguishing characteristic of the multiprocessor organization is the equal sharing of memory and I/0 by each processor. Although the processors in this organization are often alike, they need not be. When they are, the operating system software usually treats them interchangeably, and tasks may be assigned to any available processor when they become ready for execution.

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Multiprocessors have not as yet been flown in space vehicles although they have been used in ground-based and airborne installations (e.g., Control Data 6600 and 7600, UNIVAC 1108 and AN/UYK-7, IBM System 360/Model 65 Multiprocessor, and System/4 Pi VS/ANEW Multiprocessor). However, several multiprocessor configurations are in the design or development stages for spaceborne applications. These include the NASA Manned Spacecraft Center (MSC) Experimental Aerospace Multiprocessor-EXAM (refs. 33 to 35), the Massachusetts Institute of Technology (MIT) Instrumentation Laboratory Advanced Control, Guidance and Navigation Computer (refs. 28, 36 to 39), the NASA Marshall Space Flight Center (MSFC) Space Ultrareliable Modular Computer-SUMC (ref. 40), and the NASA/GSFC Parallel Ultra-Low-Power Processor-PULPP (ref. 27).

A survey of actual and proposed multiprocessor computer systems, multiprocessor theory, and problems related to the proposed space station and space base data management systems is contained in reference 30. Reference 41 describes an earlier study of the use of multiprocessing techniques for deep-space missions. Additional references to multiprocessors can be found in reference 42.

Figure 4 shows a closely related type of computer organization, the distributed processor, in which the logic elements are decentralized on an array basis. Each element has some memory associated with it, and its complexity can vary from the execution of a single instruction to a small computer. The execution of a program in the array can be centrally controlled. References 41, 43, and 44 discuss distributed processor designs which have been proposed for spaceborne applications. 

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