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A scientific study of the problems of digital engineering for space flight systems,
with a view to their practical solution.

SPARC Papers

 


LEON-1 Processor - First Evaluation Results

Jiri Gaisler
European Space Research and Technology Centre (ESTEC)

gaisler.pdf

Proceedings European Space Components Conference
ESCCONN 2000
21-23 March 2000
ESTEC, Noordwijk, The Netherlands

 Abstract
The LEON-1 is a synthesisable processor developed internally at ESTEC/TOS-ES. It has been synthesised targeting both ASIC and FPGA technologies. This paper describes the rational, design goals and current status of the LEON development.

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