The ERC32 data sheets are also provided directly by Temic/MHS from this location. The table below
provides short-cuts to the relevant documents. As of November 1996, the numbering of the
devices have changed.
|TSC691E SPARC RT Integer Unit Manual, issue I|
|TSC692E SPARC RT Floating Point Unit Manual, issue H|
|TSC693E SPARC RT Memory Controller Manual, issue 4||695K|
|SPARC V7 Instruction Set Manual|
|ERC32 CBA design consideration list, rev D||15-Jun-1998||204K|
|ERC32 CCB design consideration list, rev A||26-Oct-1998||72K|
|Final report for the ERC32 development programme, issue 1||27-May-97||290K|
|ERC32 System overview document, rev CBA, issue 3||10-April-97||925K|
|ERC32 fault-tolerance features (FTCS-24 report)||13-Nov-1994||36K||23K|
|ERC32 benchmarking results, issue 4||20-Oct-1995||39K||22K|
|ERC32 instruction timing, issue 1||20-Oct-1995||28K||18K|
|Schematics for ERC32 Master/Checker SEU test board||8-Aug-1996||118K|
|Component placement for SEU test board||8-Aug-1996||40K|
|ERC32 single-event upset test results, issue 1||22-Oct-96||109K||258K|
|ERC32 single-event upset test results, presented at FTCS-27, Seattle, US||20-Jun-97||50K|
The ERC32 VHDL models consists of fully functional, timing accurate VHDL models of the integer unit, floating-point unit and memory controller. These models are intended to be used in board level simulation and verification of ERC32-based systems. View the release notes or download.
A synthesisable VHDL model of a VME interface cicuit for ERC32 is now available! Refer to the following announcement for more info.
Last edited November 9, 19978
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