Command and Data Handling Processor
James A. Perschy, JHU/APL
10th Annual AIAA/ Utah State University Conference on Small Satellites
This command and data handling processor is designed to perform mission critical functions for the NEAR and ACE spacecraft. For both missions the processor formats telemetry and executes real-time, delayed and autonomy-rule commands. For the ACE mission the processor also performs spin stabilized attitude control. The design is based on the Harris RTX2010 microprocessor and the UTMC SÁmmit MIL-STD-1553 bus controller. Fault tolerant features added include error detection, correction and write protection memory. Components have been selected to minimize the possibility of charged particle induced upset. The processors architecture and mechanical design are described. The hardware and software test and validation methods are given.
Last Revised: January 03, 2003
Digital Engineering Institute
Web Grunt: Richard Katz